Notes through are on page 8
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08/23/02
IRF8010
SMPS MOSFET
HEXFET® Power MOSFET
VDSS RDS(on) max ID
100V 15mΩ80A
PD - 94497
TO-220AB
Applications
High frequency DC-DC converters
UPS and Motor Control
Benefits
Low Gate-to-Drain Charge to Reduce
Switching Losses
Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
Fully Characterized Avalanche Voltage
and Current
Typical RDS(on) = 12mΩ
Absolute Maximum Ratings
Parameter Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V A
IDM Pulsed Drain Current
PD @TC = 25°C Power Dissipation W
Linear Derating Factor W/°C
VGS Gate-to-Source Voltage V
dv/dt Peak Diode Recovery dv/dt V/ns
TJ Operating Junction and
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw N•m (lbf•in)
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.57
RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
RθJA Junction-to-Ambient ––– 62
-55 to + 175
300 (1.6mm from case )
1.1(10)
Max.
80
57
320
260
1.8
± 20
16
IRF8010
2www.irf.com
S
D
G
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V
∆V(BR)DSS
/
∆TJ Breakdown Voltage Temp. Coefficient ––– 0.11 ––– V/°C
RDS(on) Static Drain-to-Source On-Resistance ––– 12 15 mΩ
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA
––– ––– 250
IGSS Gate-to-Source Forward Leakage ––– ––– 200 nA
Gate-to-Source Reverse Leakage ––– ––– -200
Dynamic @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
gfs Forward Transconductance 82 ––– ––– V
QgTotal Gate Charge ––– 81 120
Qgs Gate-to-Source Charge ––– 22 ––– nC
Qgd Gate-to-Drain ("Miller") Charge ––– 26 –––
td(on) Turn-On Delay Time ––– 15 –––
trRise Time ––– 130 –––
td(off) Turn-Off Delay Time ––– 61 ––– ns
tfFall Time ––– 120 –––
Ciss Input Capacitance ––– 3830 –––
Coss Output Capacitance ––– 480 –––
Crss Reverse Transfer Capacitance ––– 59 ––– pF
Coss Output Capacitance ––– 3830 –––
Coss Output Capacitance ––– 280 –––
Coss eff. Effective Output Capacitance ––– 530 –––
Avalanche Characteristics
Parameter Units
EAS Sin
g
le Pulse Avalanche Ener
gy
mJ
IAR Avalanche Current A
EAR Repetitive Avalanche Ener
gy
mJ
Diode Characteristics
Parameter Min. Typ. Max. Units
ISContinuous Source Current ––– ––– 80
(Body Diode) A
ISM Pulsed Source Current ––– ––– 320
(Body Diode)
VSD Diode Forward Voltage ––– ––– 1.3 V
trr Reverse Recovery Time ––– 99 150 ns
Qrr Reverse RecoveryCharge ––– 460 700 nC
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Typ.
–––
–––
–––
Conditions
VDS = 25V, ID = 45A
ID = 80A
VDS = 80V
Conditions
26
VGS = 10V
VGS = 0V
VDS = 25V
ƒ = 1.0MHz
310
45
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 80A, VGS = 0V
TJ = 150°C, IF = 80A, VDD = 50V
di/dt = 100A/µs
Conditions
VGS = 0V, ID = 250µA
Reference to 25°C, ID = 1mA
VGS = 10V, ID = 45A
VDS = VGS, ID = 250µA
VDS = 100V, VGS = 0V
VDS = 100V, VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
Max.
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 80V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 80V
VGS = 10V
VDD = 50V
ID = 80A
RG = 39Ω
IRF8010
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Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
-60 -40 -20 020 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
80A
0.1 110 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
10000
ID, Drain-to-Source Current (A)
4.0V
20µs PULSE WIDTH
Tj = 25°C
VGS
TOP 15V
12V
10V
6.0V
5.5V
5.0V
4.5V
BOTTOM 4.0V
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
4.0V
20µs PULSE WIDTH
Tj = 175°C
VGS
TOP 15V
12V
10V
6.0V
5.5V
5.0V
4.5V
BOTTOM 4.0V
2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0
VGS, Gate-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (Α)
TJ = 25°C
TJ = 175°C
VDS = 50V
20µs PULSE WIDTH
IRF8010
4www.irf.com
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0.1
1
10
100
1000
0.0 0.5 1.0 1.5 2.0
V ,Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 175 C
J°
T = 25 C
J°
110 100
VDS, Drain-to-Source Voltage (V)
10
100
1000
10000
100000
C, Capacitance(pF)
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
1 10 100 1000
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
10000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100µsec
0 20406080100
QG Total Gate Charge (nC)
0
2
4
6
8
10
12
VGS, Gate-to-Source Voltage (V)
VDS= 80V
VDS= 50V
VDS= 20V
ID= 80A
IRF8010
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Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
25 50 75 100 125 150 175
0
20
40
60
80
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
LIMITED BY PACKAGE
IRF8010
6www.irf.com
Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
25 50 75 100 125 150 175
0
100
200
300
400
500
600
Starting Tj, Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
AS
°
ID
TOP
BOTTOM
18A
32A
45A
IRF8010
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P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFET® Power MOSFETs
* VGS = 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
RG
VDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
IRF8010
8www.irf.com
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
- B -
1.32 (.052)
1.22 (.048)
3X 0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
4.69 (.185)
4.20 (.165)
3X 0.93 (.037)
0.69 (.027)
4.06 (.160)
3.55 (.140)
1.15 (.045)
MIN
6.47 (.255)
6.10 (.240)
3.78 (.149)
3.54 (.139)
- A -
10.54 (.415)
10.29 (.405)
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (.555)
13.47 (.530)
3X 1.40 (.055)
1.15 (.045)
2.54 (.100)
2X
0.36 (.014) M B A M
4
1 2 3
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
EXAMPLE : THIS IS AN IRF1010
WITH ASSEMBLY
LOT CODE 9B1M
ASSEMBLY
LOT CODE
DATE CODE
(YYWW)
YY = YEAR
WW = WEEK
9246
IRF1010
9B 1M
A
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.08/02
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 0.31mH, RG = 25Ω,
IAS = 45A.
ISD ≤ 45A, di/dt ≤ 110A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C.
Notes:
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
TO-220 package is not recommended for Surface Mount Application.
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
