HN27C101AG - Hitachi Semiconductor

HN27C101AG Series

HN27C301AG Series

131072-word × 8-bit CMOS UV Erasable and Programmable

ROM

ADE-203-

Rev. 0.0

Dec. 1, 1995

Description

The Hitachi HN27C101AG/HN27C301AG is a 1-Mbit ultraviolet erasable and electrically programmable

ROM. This device is packaged in a 32-pin dual-in-line package with transparent lid. The transparent lid

allows the memory content to be erased with ultraviolet light, whereby a new pattern can then be written

into the device.

Features

• Single power supply:

+5 V ± 5% (HN27C101AG-10/HN27C301AG-10)

+5 V ± 10% (HN27C101AG/HN27C301AG-12/15/17/20/ 25)

• Fast high-reliability programming mode and fast high-reliability page programming mode

– Programming voltage: +12.5 V DC

– Fast high-reliability page programming: 14 sec typ

• High speed inputs and outputs TTL compatible during both read and program modes

• Low power dissipation: 50 mW/MHz typ (active)

5 µW typ (standby)

• Pin arrangement: 32-pin JEDEC standard (HN27C101AG)

: replaceable 32 pin MASK ROM (HN27C301AG)

• Device identifier mode: manufacturer code and device code

• Fully compatible with HN27C101G/ HN27C301G series

HN27C101AG/HN27C301AG Series

Ordering Information

Type No. Access Time Package

HN27C101AG-10

HN27C101AG-12

HN27C101AG-15

HN27C101AG-17

HN27C101AG-20

HN27C101AG-25

100 ns

120 ns

150 ns

170 ns

200 ns

250 ns

600-mil 32-pin cerdip (DG-32)

HN27C301AG-10

HN27C301AG-12

HN27C301AG-15

HN27C301AG-17

HN27C301AG-20

HN27C301AG-25

100 ns

120 ns

150 ns

170 ns

200 ns

250 ns

HN27C101AG/HN27C301AG Series

Pin Arrangement

VPP

A16

A15

A12

A7

A6

A5

A4

A3

A2

A1

A0

I/O0

I/O1

I/O2

VSS

VCC

PGM

NC

A14

A13

A8

A9

A11

OE

A10

CE

I/O7

I/O6

I/O5

I/O4

I/O3 



1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16



32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

VPP

OE

A15

A12

A7

A6

A5

A4

A3

A2

A1

A0

I/O0

I/O1

I/O2

VSS

VCC

PGM

NC

A14

A13

A8

A9

A11

A16

A10

CE

I/O7

I/O6

I/O5

I/O4

I/O3 



1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16



32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

(Top view) (Top view)

HN27C101AG Series HN27C301AG Series

Pin Description

Pin Name Function

A0 – A16 Address

I/O0 – I/O7 Input/output

CE Chip enable

OE Output enable

VCC Power supply

VPP Programming power supply

VSS Ground

PGM Programming enable

NC No connection

HN27C101AG/HN27C301AG Series

Block Diagram

X-Decoder

Input

Data

Control

Y-Gating

Y-Decoder

A0 – A4

H: High Threshold Inverter

1024 × 1024

Memory Matrix

I/O0

I/O7

VCC

VPP

VSS

A10, A11

PGM

A12

A16

HN27C101AG/HN27C301AG Series

Mode Selection

Mode CE OE PGM A9 VPP VCC I/O

HN27C101AG (22) (24) (31) (26) (1) (32) (13 – 15, 17 – 21)

HN27C301AG (22) (2) (31) (26) (1) (32) (13 – 15, 17 – 21)

Read VIL VIL VIH XV

CC VCC Dout

Output disable VIL VIH VIH XV

CC VCC High-Z

Standby VIH XXXV

CC VCC High-Z

Program VIL VIH VIL XV

PP VCC Din

Program verify VIL VIL VIH XV

PP VCC Dout

Page data latch VIH VIL VIH XV

PP VCC Din

Page program VIH VIH VIL XV

PP VCC High-Z

Program inhibit VIL VIL VIL XV

PP VCC High-Z

VIL VIH VIH

VIH VIL VIL

VIH VIH VIH

Identifier VIL VIL VIH VHVCC VCC Code

Notes: 1. X: Don’t care

2. VH: 12.0 V ± 0.5 V

Absolute Maximum Ratings

Parameter Symbol Value Unit

All input and output voltages*1Vin, Vout –0.6*2 to +7.0 V

A9 input voltage*1VID –0.6*2 to +13.5 V

VPP voltage*1VPP –0.6 to +13.5 V

VCC voltage*1VCC –0.6 to +7.0 V

Operating temperature range Topr 0 to +70 °C

Storage temperature range Tstg –65 to +125 °C

Storage temperature range under bias Tbias –10 to +80 °C

Notes: 1. Relative to VSS

2. Vin, Vout and VID min = –1.0 V for pulse width ≤ 50 ns

Capacitance (Ta = 25°C, f = 1 MHz)

Parameter Symbol Min Typ Max Unit Test Conditions

Input capacitance Cin ——10 pF Vin = 0 V

Output capacitance Cout ——15 pF Vout = 0 V

HN27C101AG/HN27C301AG Series

Read Operation

DC Characteristics (VCC = 5 V ± 5%, VPP = VCC, Ta = 0 to +70°C) (HN27C101AG/HN27C301AG-10)

(VCC = 5 V ± 10%, VPP = VCC, Ta = 0 to +70°C)

(HN27C101AG/HN27C301AG-12/15/17/20/25)

Parameter Symbol Min Typ Max Unit Test Conditions

Input leakage current ILI ——2µA Vin = 0 V to VCC

Output leakage current ILO ——2µA Vout = 0 V to VCC

VPP current IPP1 —120µAV

PP = 5.5 V

Standby VCC current ISB1 ——1mACE = VIH

ISB2 —120µACE = VCC ± 0.3 V

Operating VCC current ICC1 ——30 mA CE = VIL, Iout = 0 mA

ICC2 ——30 mA f = 5 MHz, Iout = 0 mA

——50 mA f = 10 MHz, Iout = 0 mA

Input low voltage VIL –0.3*1—0.8 V

Input high voltage VIH 2.2 —VCC +

1.0*2V

Output low voltage VOL ——0.45 V IOL = 2.1 mA

Output high voltage VOH 2.4 ——VI

OH = –1 mA

VCC – 0.7 ——VI

OH = –0.1 mA

Notes: 1. VIL min = –1.0 V for pulse width ≤ 50 ns

2. VIH max = VCC +1.5 V for pulse width ≤ 20 ns

If VIH is over the specified maximum value, read operation cannot be guaranteed.

HN27C101AG/HN27C301AG Series

AC Characteristics (VCC = 5 V ± 5%, VPP = VCC, Ta = 0 to +70°C) (HN27C101AG/HN27C301AG-10)

(VCC = 5 V ± 10%, VPP = VCC, Ta = 0 to +70°C)

(HN27C101AG/HN27C301AG-12/15/17/20/25)

Test Conditions

• Input pulse levels: 0.45 V to 2.4 V

• Input rise and fall time: ≤ 20 ns

• Output load: 1 TTL gate +100 pF

• Reference levels for measuring timing: Inputs; 0.8 V and 2.0 V

Outputs; 0.8 V and 2.0 V

HN27C101AG/HN27C301AG

-10 -12 -15 -17 -20 -25 Test

Parameter Symbol Min Max Min Max Min Max Min Max Min Max Min Max Unit Conditions

Address to

output delay tACC —100 —120 —150 —170 —200 —250 ns CE = OE =

VIL

CE to output

delay tCE —100 —120 —150 —170 —200 —250 ns OE = VIL

OE to output

delay tOE —60 —60 —70 —70 —70 —100 ns CE = VIL

OE high to

output float tDF 0 50 0 50 0 50 0 50 0 50 0 60 ns CE = VIL

Address to

output hold tOH 0—0—0—0—0—0—ns CE = OE =

VIL

Note: tDF is defined as the time at which the output achieves the open circuit condition and data is no

longer driven.

HN27C101AG/HN27C301AG Series

Read Timing Waveform

tACC

Address 



Data Out

Standby Mode Active Mode Standby Mode

Data Out Valid

tOE tDF

tOH

tCE

HN27C101AG/HN27C301AG Series

Fast High-Reliability Programming

This device can be applied the programming algorithm shown in following flowchart. This algorithm

allows to obtain faster programming time without any voltage stress to the device nor deterioration in

reliability of programmed data.

START

SET PROG./VERIFY MODE

VPP = 12.5 ± 0.3 V, VCC = 6.0 ± 0.25 V



Address = 0

n = 0

Program tOPW = 0.2 ms ± 5%

VERIFY

NO LAST

Address?

READ

All Address

END FAIL

n = 25

SET READ MODE

VCC = 5.0 ± 0.25 V, VPP = VCC

Address + 1 Address

YES

NOGO

YES

n + 1 n

NOGO

Program tOPW = 0.2n ms

Fast High-Reliability Programming Flowchart

HN27C101AG/HN27C301AG Series

DC Characteristics (Ta = 25 °C ± 5°C, VCC = 6 V ± 0.25 V, VPP = 12.5 V ± 0.3 V)

Parameter Symbol Min Typ Max Unit Test Conditions

Input leakage current ILI ——2µA Vin = 0 V to VCC

VPP supply current IPP ——40 mA CE = PGM = VIL

Operating VCC current ICC ——30 mA

Input low level VIL –0.1*5—0.8 V

Input high level VIH 2.2 —VCC + 0.5*6V

Output low voltage during verify VOL ——0.45 V IOL = 2.1 mA

Output high voltage during verify VOH 2.4 —— VI

OH = –400 µA

Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP.

2. VPP must not exceed 13.5 V including overshoot.

3. An influence may be had upon device reliability if the device is installed or removed while VPP =

12.5 V.

4. Do not alter VPP either VIL to 12.5 V or 12.5 V to VIL when CE = Low.

5. VIL min = –0.6 V for pulse width ≤ 20 ns

6. If VIH is over the specified maximum value, programming operation cannot be guaranteed.

HN27C101AG/HN27C301AG Series

AC Characteristics (Ta = 25°C ± 5°C, VCC = 6 V ± 0.25 V, VPP = 12.5 V ± 0.3 V)

Test Conditions

• Input pulse levels: 0.45 V to 2.4 V

• Input rise and fall time: ≤ 20 ns

• Reference levels for measuring timing: Inputs; 0.8 V and 2.0 V

Outputs; 0.8 V and 2.0 V

Parameter Symbol Min Typ Max Unit Test Conditions

Address setup time tAS 2——µs

OE setup time tOES 2——µs

Data setup time tDS 2——µs

Address hold time tAH 0——µs

Data hold time tDH 2——µs

OE to output float delay tDF*10—130 ns

VPP setup time tVPS 2——µs

CC setup time tVCS 2——µs

PGM initial programming pulse

width tPW 0.19 0.2 0.21 ms

PGM overprogramming pulse width tOPW*20.19 —5.25 ms

CE setup time tCES 2——µs

Data valid from OE tOE 0—150 ns

Notes: 1. tDF is defined as the time at which the output achieves the open circuit condition and data is no

longer driven.

2. Refer to the programming flowchart for tOPW.

HN27C101AG/HN27C301AG Series

Fast High-Reliability Programming Timing Waveform

Address

Data

VPP

VCC

tVCS

VCC

VCC+1

VCC

VPP

PGM

tVPS

tDS tDH tDF

tAH

tAS

Program Program Verify

tCES

tPW tOES tOE

Data In Stable Data Out Valid

HN27C101AG/HN27C301AG Series

Fast High-Reliability Page Programming

This device can be applied the high performance page programming algorithm shown in following

flowchart. This algorithm allows to obtain faster programming time without any voltage stress to the

device nor deterioration in reliability of programmed data.

START

SET PAGE PROG. LATCH MODE

VPP = 12.5 ± 0.3 V, VCC = 6.0 ± 0.25 V



Address = 0

n = 0

READ

All Address

END FAIL

n = 25 YES

NOGO

Latch

Program tPW = 0.2 ms ± 5%

VERIFY

LAST

Address?

SET READ MODE

VCC = 5.0 ± 0.25 V, VPP = VCC

YES

NOGO

Program tOPW = 0.2n ms

Address + 1

Address

Address + 1

Address

Latch

Address + 1

Address

Latch

Address + 1

Address

Latch

n + 1 n

SET PAGE PROG./

VERIFY MODE

VPP = 12.5 ± 0.3 V,

VCC = 6.0 ± 0.25 V

Fast High-Reliability Page Programming Flowchart

HN27C101AG/HN27C301AG Series

DC Characteristics (Ta = 25 °C ± 5°C, VCC = 6 V ± 0.25 V, VPP = 12.5 V ± 0.3 V)

Parameter Symbol Min Typ Max Unit Test Conditions

Input leakage current ILI ——2µA Vin = 0 V to VCC

VPP supply current IPP ——50 mA CE = OE= VIH, PGM = VIL

Operating VCC current ICC ——30 mA

Input low level VIL –0.1*5—0.8 V

Input high level VIH 2.2 —VCC + 0.5*6V

Output low voltage during verify VOL ——0.45 V IOL = 2.1 mA

Output high voltage during verify VOH 2.4 —— VI

OH = –400 µA

Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP.

2. VPP must not exceed 13.5 V including overshoot.

3. An influence may be had upon device reliability if the device is installed or removed while VPP =

12.5 V.

4. Do not alter VPP either VIL to 12.5 V or 12.5 V to VIL when CE = Low.

5. VIL min = –0.6 V for pulse width ≤ 20 ns

6. If VIH is over the specified maximum value, programming operation cannot be guaranteed.

HN27C101AG/HN27C301AG Series

AC Characteristics (Ta = 25°C ± 5°C, VCC = 6 V ± 0.25 V, VPP = 12.5 V ± 0.3 V)

Test conditions

• Input pulse levels: 0.45 V to 2.4 V

• Input rise and fall time: ≤ 20 ns

• Reference levels for measuring timing: Inputs; 0.8 V and 2.0 V

Outputs; 0.8 V and 2.0 V

Parameter Symbol Min Typ Max Unit

Address setup time tAS 2——µs

OE setup time tOES 2——µs

Data setup time tDS 2——µs

Address hold time tAH 0——µs

AHL 2——µs

Data hold time tDH 2——µs

OE to output float delay tDF*10—130 ns

VPP setup time tVPS 2——µs

CC setup time tVCS 2——µs

PGM initial programming pulse width tPW 0.19 0.2 0.21 ms

PGM overprogramming pulse width tOPW*20.19 —5.25 ms

CE setup time tCES 2——µs

Data valid from OE tOE 0—150 ns

OE pulse width during data latch tLW 1——µs

PGM setup time tPGMS 2——µs

CE hold time tCEH 2——µs

OE hold time tOEH 2——µs

Notes: 1. tDF is defined as the time at which the output achieves the open circuit condition and data is no

longer driven.

2. Refer to the programming flowchart for tOPW.

HN27C101AG/HN27C301AG Series

Fast High-Reliability Page Programming Timing Waveform

A0, A1

Data

VPP

VCC VCC

VCC+1

VCC

VPP

PGM

tAS

Page data latch Page program program verify

A2 to A16 tAHL

tDS tDH

Data in stable

tPGMS tOE tDF

Data out valid

tVPS

tVCS tCES

tCEH

tPW

tOES

tOEH

tLW

tAH

Erase

Erasure of this device is performed by exposure to ultraviolet light of 2537 Å and all the output data are

changed to „1“ after this erasure procedure. The minimum integrated dose (i.e. UV intensity × exposure

time) for erasure is 15 W. sec/cm2.

HN27C101AG/HN27C301AG Series

Mode Description

Device Identifier Mode

The device identifier mode allows the reading out of binary codes that identify manufacturer and type of

device, from outputs of EPROM. By this mode, the device will be automatically matched its own

corresponding programming algorithm, using programming equipment.

HN27C101AG Identifier Code

Identifier A0

(12) A9

(26) I/O7

(21) I/O6

(20) I/O5

(19) I/O4

(18) I/O3

(17) I/O2

(15) I/O1

(14) I/O0

(13) Hex Data

Manufacturer code VIL VH0000011107

Device code VIH VH0011100038

HN27C301AG Identifier Code

Identifier A0

(12) A9

(26) I/O7

(21) I/O6

(20) I/O5

(19) I/O4

(18) I/O3

(17) I/O2

(15) I/O1

(14) I/O0

(13) Hex Data

Manufacturer code VIL VH0000011107

Device code VIH VH10111001B9

Notes: 1. VH = 12.0 V ± 0.5 V

2. A1–A8, A10–A16, CE, OE = VIL, PGM = VIH

HN27C101AG/HN27C301AG Series

Package Dimensions

HN27C101AG/HN27C301AG Series (DG-32) Unit: mm

0.38 Min

2.54 Min

0.48 ± 0.10

2.54 ± 0.25

1.32

41.91

14.66

0.25

0 – 10°

+ 0.11

– 0.05

15.24

32 17

116

5.89 Max

φ8.89

43.18 Max

15.51 Max

2.54 Max