General Description
The MAX1447/MAX1496/MAX1498 low-power, 3.5- and
4.5-digit, analog-to-digital converters (ADCs) with inte-
grated light-emitting diode (LED) drivers operate from a
single 2.7V to 5.25V power supply. They include an
internal reference, a high-accuracy on-chip oscillator,
and a multiplexed LED display driver. An internal charge
pump generates the negative supply needed to power
the integrated input buffers for single-supply operation.
The ADC is configurable for either a ±2V or ±200mV
input range and it outputs its conversion results to an
LED. The MAX1496 is a 3.5-digit (±1999 count) device
and the MAX1447/MAX1498 are 4.5-digit (±19,999
count) devices.
The MAX1447/MAX1496/MAX1498 do not require exter-
nal precision integrating capacitors, autozero capaci-
tors, crystal oscillators, charge pumps, or other circuitry
required with dual-slope ADCs (commonly used in
panel meter circuits).
These devices also feature on-chip buffers for the dif-
ferential signal and reference input, allowing direct
interface with high-impedance signal sources. In addi-
tion, they use continuous internal offset-calibration and
offer >100dB rejection of 50Hz and 60Hz line noise.
Other features include data hold and peak detection
and overrange/underrange detection. The MAX1447
features on-demand enhanced offset calibration for
improved offset performance.
The MAX1447/MAX1498 are available in a 32-pin, 7mm
✕7mm TQFP package and the MAX1496 is available in
28-pin SSOP and 28-pin PDIP packages. All devices in
this family operate over the -40°C to +85°C extended
temperature range.
Applications
Digital Panel Meters
Hand-Held Meters
Digital Voltmeters
Digital Multimeters
Features
♦High Resolution
MAX1447/MAX1498: 4.5 Digits (±19,999 Count)
MAX1496: 3.5 Digits (±1999 Count)
♦Sigma-Delta ADC Architecture
No Integrating Capacitors Required
No Autozeroing Capacitors Required
>100dB of Simultaneous 50Hz and 60Hz
Rejection
♦Selectable Input Range of ±200mV or ±2V
♦Selectable Voltage Reference: Internal 2.048V or
External
♦Internal High-Accuracy Oscillator Needs No
External Components
♦Automatic Offset Calibration
♦On-Demand Enhanced Offset Calibration
(MAX1447)
♦Operate from a Single 2.7V to 5.25V Supply
♦Low Power (Exclude LED-Driver Current)
Maximum 744µA Operating Current (MAX1496)
Maximum 960µA Operating Current
(MAX1447/MAX1498)
Maximum 325µA Shutdown Current
♦Multiplexed Common-Cathode LED Drivers
Resistor-Programmable Segment Current
♦Small 32-Pin, 7mm x 7mm TQFP Package (4.5
Digits), 28-Pin SSOP Package (3.5 Digits)
♦Also Available in a PDIP Package (3.5 Digits)
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
19-3166; Rev 0; 1/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PART
TEMP RANGE
PIN-
PACKAGE
RESOLUTION
(DIGITS)
MAX1447ECJ
-40°C to +85°C
32 TQFP 4.5
MAX1496EAI*
-40°C to +85°C
28 SSOP 3.5
MAX1496EPI
-40°C to +85°C
28 PDIP 3.5
MAX1498ECJ
-40°C to +85°C
32 TQFP 4.5
Pin Configurations appear at end of data sheet.
*Future product—contact factory for availability.
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
2_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVDD to GND (MAX1447/MAX1498)........................-0.3V to +6V
DVDD to GND (MAX1447/MAX1498)........................-0.3V to +6V
AIN+, AIN- to GND
(MAX1447/MAX1498) ......................VNEG to (AVDD to +0.3V)
REF+, REF- to GND
(MAX1447/MAX1498) ..................... VNEG to (AVDD to +0.3V)
INTREF, RANGE, DPSET1, DPSET2, HOLD, PEAK,
DPON to GND (MAX1447/MAX1498) ..-0.3V to (DVDD + 0.3V)
VNEG to GND (MAX1447/MAX1498).......-2.6V to (AVDD + 0.3V)
LED_EN to GND (MAX1447/MAX1498)...-0.3V to (DVDD + 0.3V)
ISET to GND (MAX1447/MAX1498) .........-0.3V to (AVDD + 0.3V)
VDD to GND (MAX1496)...........................................-0.3V to +6V
AIN+, AIN- to GND (MAX1496)..............VNEG to (VDD to +0.3V)
REF+, REF- to GND (MAX1496) ........... VNEG to (VDD to +0.3V)
INTREF, RANGE, DPSET1, DPSET2, HOLD, PEAK,
DPON to GND (MAX1496) .....................-0.3V to (VDD + 0.3V)
VNEG to GND (MAX1496)..........................-2.6V to (VDD + 0.3V)
ISET to GND (MAX1496) ............................-0.3V to (VDD + 0.3V)
VLED to GLED ..........................................................-0.3V to +6V
GLED to GND ........................................................-0.3V to +0.3V
SEG_ to GLED..........................................-0.3V to (VLED + 0.3V)
DIG_ to GLED ..........................................-0.3V to (VLED + 0.3V)
DIG_ Sink Current .............................................................300mA
DIG_ Source Current...........................................................50mA
SEG_ Sink Current ..............................................................50mA
SEG_ Source Current..........................................................50mA
Maximum Current Input into Any Other Pin ........................50mA
Continuous Power Dissipation (TA= +70°C)
32-Pin TQFP (derate 20.7mW/°C above +70°C).....1652.9mW
28-Pin SSOP (derate 9.5mW/°C above +70°C) ...........762mW
28-Pin PDIP (derate 14.3mW/°C above +70°C)......1142.9mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
ELECTRICAL CHARACTERISTICS
(AVDD = DVDD = VDD = +2.7V to +5.25V, GND = 0, VLED = +2.7V to +5.25V, GLED = 0, VREF+ - VREF- = 2.048V (external reference),
CREF+ = CREF- = 0.1µF, CVNEG = 0.1µF. Internal clock mode, unless otherwise noted. All specifications are at TA= TMIN to TMAX.
Typical values are at TA= +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC ACCURACY
MAX1447/MAX1498
-19,999 +19,999
Noise-Free Resolution MAX1496
-1999 +1999
Counts
2.000V range ±1
Integral Nonlinearity (Note 1) INL 200mV range ±1
Counts
Range Change Ratio (VAIN+ - VAIN- = 0.100V) on 200mV range
(VAIN+ - VAIN- = 0.100V) on 2.0V range
10:1
Ratio
Rollover Error VAIN+ - VAIN- = full scale
VAIN- - VAIN+ = full scale ±1
Counts
Output Noise 10
µVP-P
Offset Error (Zero Input Reading)
Offset VIN = 0 (Note 2) -0 0
Read ings
Gain Error (Note 3)
-0.5 +0.5
% FSR
Offset Drift (Zero Reading Drift) VIN = 0 (Note 4) 0.1
µV/°C
Gain Drift ±1
ppm/°C
INPUT CONVERSION RATE
Conversion Rate 5Hz
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
_______________________________________________________________________________________ 3
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
ANALOG INPUTS (AIN+, AIN-) (bypass to GND with 0.1µF or greater capacitors)
RANGE = GND
-2.0 +2.0
AIN Input Voltage Range (Note 5)
RANGE = DVDD (MAX1447/MAX1498) or
VDD (MAX1496)
-0.2 +0.2
V
AIN Absolute Input Voltage
Range to GND
-2.2 +2.2
V
Normal-Mode 50Hz and 60Hz
Rejection (Simultaneously) 50Hz and 60Hz ±2%
100
dB
Common-Mode 50Hz and 60Hz
Rejection (Simultaneously) CMR
For 50Hz and 60Hz ±2%, RSOURCE < 10kΩ150
dB
Common-Mode Rejection CMR At DC
100
dB
Input Leakage Current 10 nA
Input Capacitance 10 pF
Average Dynamic Input Current
(Note 6) -20 +20 nA
INTERNAL REFERENCE (REF- = GND, INTREF = DVDD (MAX1447/MAX1498) or VDD (MAX1496) (bypass REF+ to GND with a
4.7µF capacitor)
REF Output Voltage VREF
2.007 2.048 2.089
V
REF Output Short-Circuit Current
1mA
REF Output Temperature
Coefficient
TCVREF
40
Load Regulation ISOURCE = 0 to 300µA, ISINK = 0 to 30µA 6
Line Regulation 50
0.1Hz to 10Hz 25
Noise Voltage 10Hz to 10kHz
400
EXTERNAL REFERENCE (INTREF = GND) (bypass REF+ and REF- to GND with 0.1µF or greater capacitors)
REF Input Voltage Differential, VREF+ - VREF-
2.048
V
Absolute REF+, REF- Input
Voltage to GND
-2.2 +2.2
V
Normal-Mode 50Hz and 60Hz
Rejection (Simultaneously) 50Hz and 60Hz ±2%
100
dB
Common-Mode 50Hz and 60Hz
Rejection (Simultaneously) CMR
For 50Hz and 60Hz ±2%, RSOURCE < 10kΩ150
dB
Common-Mode Rejection CMR At DC
100
dB
Input Leakage Current 10 nA
Input Capacitance 10 pF
Average Dynamic Input Current (Note 6) -20 +20 nA
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = VDD = +2.7V to +5.25V, GND = 0, VLED = +2.7V to +5.25V, GLED = 0, VREF+ - VREF- = 2.048V (external reference),
CREF+ = CREF- = 0.1µF, CVNEG = 0.1µF. Internal clock mode, unless otherwise noted. All specifications are at TA= TMIN to TMAX.
Typical values are at TA= +25°C, unless otherwise noted.)
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
4_______________________________________________________________________________________
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
CHARGE PUMP
Output Voltage VNEG CVNEG = 0.1µF to GND
-2.60 -2.42 -2.30
V
DIGITAL INPUTS (INTREF, RANGE, PEAK, HOLD, DPSET1, DPSET2, DPON)
Input Current IIN VIN = 0 or DVDD = VDD -10 +10 µA
MAX1447/MAX1498 0.3 x
DVDD
Input Low Voltage VINL
MAX1496 0.3 x
VDD
V
MAX1447/MAX1498 0.7 x
DVDD
Input High Voltage VINH
MAX1496 0.7 x
VDD
V
Input Hysteresis VHYS
200
mV
POWER SUPPLY (Note 7)
VDD Voltage VDD MAX1496
2.70 5.25
V
AVDD Voltage AVDD MAX1447/MAX1498
2.70 5.25
V
DVDD Voltage DVDD MAX1447/MAX1498
2.70 5.25
V
Power-Supply Rejection VDD PSRR (Note 8) 80 dB
Power-Supply Rejection AVDD
PSRRA
(Note 8) 80 dB
Power-Supply Rejection DVDD
PSRRD
(Note 8)
100
dB
VDD = 5.25V
664
744
VDD = 3.3V
618
663
MAX1496 VDD Current (Note 9) IVDD
Standby mode
268
325
µA
AVDD = 5.25V 640
AVDD = 3.3V 600
MAX1447/MAX1498 AVDD
Current (Note 9) IAVDD
Standby mode 305
µA
DVDD = 5.25V 320
DVDD = 3.3V 180
MAX1447/MAX1498 DVDD
Current (Note 9) IDVDD
Standby mode 20
µA
LED Drivers Bias Current From AVDD or VDD
120
µA
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = VDD = +2.7V to +5.25V, GND = 0, VLED = +2.7V to +5.25V, GLED = 0, VREF+ - VREF- = 2.048V (external reference),
CREF+ = CREF- = 0.1µF, CVNEG = 0.1µF. Internal clock mode, unless otherwise noted. All specifications are at TA= TMIN to TMAX.
Typical values are at TA= +25°C, unless otherwise noted.)
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
_______________________________________________________________________________________ 5
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
LED DRIVERS (Table 5)
LED Supply Voltage VLED
2.70 5.25
V
LED Shutdown Supply Current ISHDN LED driver shutdown mode 10 µA
LED Supply Current ILED Seven segments and decimal point on,
RISET = 25kΩ
176
180 mA
MAX1447/MAX1498
512
Display Scan Rate fOSC MAX1496
640
Hz
Segment Current Slew Rate
∆ISEG/∆t
25
mA/µs
DIG_ Voltage Low VDIG IDIG_ = 176mA
0.178 0.300
V
Segment Drive Source Current
Matching ∆ISEG 3±10 %
Segment Drive Source Current ISEG VLED - VSEG = 0.6V, RISET = 25kΩ
16.0 21.5 25.5
mA
Interdigit Blanking Time 4µs
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = VDD = +2.7V to +5.25V, GND = 0, VLED = +2.7V to +5.25V, GLED = 0, VREF+ - VREF- = 2.048V (external reference),
CREF+ = CREF- = 0.1µF, CVNEG = 0.1µF. Internal clock mode, unless otherwise noted. All specifications are at TA= TMIN to TMAX.
Typical values are at TA= +25°C, unless otherwise noted.)
Note 1: Integral nonlinearity is the deviation of the analog value at any code from its theoretical value after nulling the gain error and
offset error.
Note 2: Offset calibrated.
Note 3: Offset nulled.
Note 4: Drift error is eliminated by recalibration at the new temperature.
Note 5: The input voltage range for the analog inputs is given with respect to the voltage on the negative input of the differential pair.
Note 6: VAIN+ or VAIN- = -2.2V to +2.2V. VREF+ or VREF- = -2.2V to +2.2V. All input structures are identical. Production tested on
AIN+ and REF+ only.
Note 7: Power-supply currents are measured with all digital inputs at either GND or DVDD.
Note 8: Measured at DC by changing the power-supply voltage from 2.7V to 5.25V and measuring the effect on the conversion
error with external reference. PSRR at 50Hz and 60Hz exceeds 120dB with filter notches at 50Hz and 60Hz (Figure 2).
Note 9: LED drivers are disabled.
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
6_______________________________________________________________________________________
Typical Operating Characteristics
(AVDD = DVDD = VDD = VLED = +2.7V to +5.25V, GND = 0, GLED = 0, external reference mode, REF+ = 2.048V, REF- = GND,
RANGE = 1, internal clock mode, TA= +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE (MAX1447/MAX1498)
MAX1447/96/98 toc01
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (µA)
4.754.253.753.25
100
200
300
400
500
600
700
0
2.75 5.25
ANALOG SUPPLY
DIGITAL SUPPLY
SUPPLY CURRENT
vs. SUPPLY VOLTAGE (MAX1496)
MAX1447/96/98 toc02
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (µA)
4.744.233.723.21
450
500
550
600
650
700
400
2.70 5.25
SUPPLY CURRENT
vs. TEMPERATURE (MAX1447/MAX1498)
MAX1447/96/98 toc03
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
605040302010
100
200
300
400
500
600
700
0
070
ANALOG SUPPLY
DIGITAL SUPPLY
SUPPLY CURRENT
vs. TEMPERATURE (MAX1496)
MAX1447/96/98 toc04
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
6035-15 10
610
640
630
620
650
660
670
680
690
700
600
-40 85
SHUTDOWN CURRENT
vs. TEMPERATURE (MAX1447/MAX1498)
MAX1447/96/98 toc05
TEMPERATURE (°C)
SHUTDOWN CURRENT (µA)
605040302010
50
100
150
200
250
300
0
070
ANALOG SUPPLY
DIGITAL SUPPLY
SHUTDOWN CURRENT
vs. SUPPLY VOLTAGE (MAX1447/MAX1498)
MAX1447/96/98 toc07
SUPPLY VOLTAGE (V)
SHUTDOWN CURRENT (µA)
4.754.253.753.25
50
100
150
200
250
300
0
2.75 5.25
ANALOG SUPPLY
DIGITAL SUPPLY
SHUTDOWN CURRENT
vs. SUPPLY VOLTAGE (MAX1496)
MAX1447/96/98 toc08
SUPPLY VOLTAGE (V)
SHUTDOWN CURRENT (µA)
4.744.233.723.21
50
150
100
200
250
300
350
0
2.70 5.25
OFFSET ERROR vs. SUPPLY VOLTAGE
(MAX1447/MAX1498)
MAX1447/96/98 toc09
SUPPLY VOLTAGE (V)
OFFSET ERROR (LSB)
4.754.253.753.25
-0.11
-0.06
-0.01
0.04
0.09
0.14
0.19
-0.16
2.75 5.25
SHUTDOWN CURRENT
vs. TEMPERATURE (MAX1496)
MAX1447/96/98 toc06
TEMPERATURE (°C)
SHUTDOWN CURRENT (µA)
6035-15 10
50
150
100
200
250
300
350
0
-40 85
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
_______________________________________________________________________________________ 7
INTERNAL REFERENCE VOLTAGE
vs. TEMPERATURE
MAX1447/96/98 toc16
TEMPERATURE (°C)
REFERENCE VOLTAGE (V)
605040302010
2.046
2.045
2.047
2.049
2.048
2.051
2.050
2.053
2.052
2.054
2.044
070
INTERNAL REFERENCE VOLTAGE
vs. ANALOG SUPPLY VOLTAGE
MAX1447/96/98 toc17
SUPPLY VOLTAGE (V)
REFERENCE VOLTAGE (V)
4.754.253.753.25
2.045
2.046
2.047
2.048
2.049
2.050
2.044
2.75 5.25
Typical Operating Characteristics (continued)
(AVDD = DVDD = VDD = VLED = +2.7V to +5.25V, GND = 0, GLED = 0, external reference mode, REF+ = 2.048V, REF- = GND,
RANGE = 1, internal clock mode, TA= +25°C, unless otherwise noted.)
OFFSET ERROR vs. TEMPERATURE
(MAX1447/MAX1498)
MAX1447/96/98 toc10
TEMPERATURE (°C)
OFFSET ERROR (LSB)
605010 20 30 40
-0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
-0.2
070
GAIN ERROR vs. SUPPLY VOLTAGE
(MAX1447/MAX1498)
MAX1447/96/98 toc11
SUPPLY VOLTAGE (V)
GAIN ERROR (% FULL SCALE)
4.754.253.25 3.75
-0.08
-0.04
-0.06
-0.02
0
0.02
0.04
0.06
0.08
-0.10
2.75 5.25
GAIN ERROR vs. TEMPERATURE
(MAX1447/MAX1498)
MAX1447/96/98 toc12
TEMPERATURE (°C)
GAIN ERROR (% FULL SCALE)
605030 402010
-0.09
-0.08
-0.07
-0.06
-0.05
-0.04
-0.03
-0.02
-0.01
0
-0.10
070
(±200mV INPUT RANGE) INL vs. OUTPUT CODE
(MAX1447/MAX1498)
MAX1447/96/98 toc13
OUTPUT CODE
INL (COUNTS)
10,0000-10,000
-0.5
0
0.5
1.0
-1.0
-20,000 20,000
(±2V INPUT RANGE) INL vs. OUTPUT CODE
(MAX1447/MAX1498)
MAX1447/96/98 toc14
OUTPUT CODE
INL (COUNTS)
10,0000-10,000
-0.5
0
0.5
1.0
-1.0
-20,000 20,000
NOISE DISTRIBUTION
MAX1447/96/98 toc15
NOISE COUNTS
PERCENTAGE OF UNITS (%)
0.80.70.60.50.40.30.20.10-0.1
5
10
15
20
25
0
-0.2
DATA OUTPUT RATE
vs. TEMPERATURE
MAX1447/96/98 toc18
TEMPERATURE (°C)
DATA OUTPUT RATE (Hz)
6035-15 10
4.92
4.98
4.96
4.94
5.00
5.02
5.04
5.06
5.08
5.10
4.90
-40 85
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
8_______________________________________________________________________________________
Typical Operating Characteristics (continued)
(AVDD = DVDD = VDD = VLED = +2.7V to +5.25V, GND = 0, GLED = 0, external reference mode, REF+ = 2.048V, REF- = GND,
RANGE = 1, internal clock mode, TA= +25°C, unless otherwise noted.)
DATA OUTPUT RATE
vs. SUPPLY VOLTAGE
MAX1447/96/98 toc19
SUPPLY VOLTAGE (V)
DATA OUTPUT RATE (Hz)
4.744.233.21 3.72
4.995
4.990
4.985
5.000
5.005
5.010
5.015
5.020
4.980
2.70 5.25
OFFSET ERROR
vs. COMMON-MODE VOLTAGE
MAX1447/96/98 toc20
COMMON-MODE VOLTAGE (V)
OFFSET ERROR COUNTS
1.51.0-1.5 -1.0 -0.5 0 0.5
-0.15
-0.10
-0.05
0
0.05
0.10
0.15
0.20
-0.20
-2.0 2.0
SEGMENT CURRENT
vs. SUPPLY VOLTAGE
MAX1447/96/98 toc23
SUPPLY VOLTAGE (V)
SEGMENT CURRENT (µA)
4.744.233.723.21
5
10
15
20
25
30
0
2.70 5.25
RISET = 25kΩ
VNEG STARTUP SCOPE SHOT
MAX1447/96/98 toc21
20ms/div
2V/div
1V/div
VDD
VNEG
CHARGE-PUMP OUTPUT VOLTAGE
vs. ANALOG SUPPLY VOLTAGE
MAX1447/96/98 toc22
SUPPLY VOLTAGE (V)
VNEG VOLTAGE (V)
4.754.253.753.25
-2.48
-2.46
-2.44
-2.42
-2.40
-2.50
2.75 5.25
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
_______________________________________________________________________________________ 9
Pin Description
PIN
MAX1496 MAX1447/
MAX1498
NAME
FUNCTION
131
VNEG
-2.5V Charge-Pump Voltage Output. Connect a 0.1µF capacitor to GND.
232REF-
Negative Reference Voltage Input. For internal-reference operation, connect REF- to GND.
For external-reference operation, bypass REF- to GND with a 0.1µF capacitor and set VREF-
from -2.2V to +2.2V, provided VREF+ > VREF-.
31REF+
Positive Reference Voltage Input. For internal-reference operation, connect a 4.7µF
capacitor from REF+ to GND. For external-reference operation, bypass REF+ to GND with a
0.1µF capacitor and set VREF+ from -2.2V to +2.2V, provided VREF+ > VREF-.
42AIN+ Positive Analog Input. Positive side of fully differential analog input. Bypass AIN+ to GND
with a 0.1µF or greater capacitor.
53AIN- Negative Analog Input. Negative side of fully differential analog input. Bypass AIN- to GND
with a 0.1µF or greater capacitor.
64ISET Segment Current Controller. Connect to ground through a resistor to set the segment
current. See Table 5 for current selection.
75GND Ground
8—V
DD Analog and Digital Circuit Supply Voltage. Connect VDD to a +2.7V to +5.25V power supply.
Bypass VDD to GND with a 0.1µF capacitor and a 4.7µF capacitor.
98
INTREF
Internal-Reference Logic Input. Connect to GND to select external-reference mode. Connect
to DVDD for the MAX1447/MAX1498 and VDD for the MAX1496 to select the internal-
reference mode.
10 9
RANGE
Range Logic Input. RANGE controls the fully differential analog input range. Connect to
GND for the ±2V input range. Connect to DVDD (MAX1447/MAX1498) or VDD (MAX1496) for
the ±200mV input range.
11 10
DPSET1
Decimal-Point Logic-Input 1. Controls the decimal point of the LED. See the Decimal-Point
Control section.
12 11
DPSET2
Decimal-Point Logic-Input 2. Controls the decimal point of the LED. See the Decimal-Point
Control section.
13 12
PEAK
Peak Logic Input. Connect to DVDD (MAX1447/MAX1498) or VDD (MAX1496) to display the
highest ADC value on the LED. Connect to GND to disable the peak function.
14 13
HOLD
Hold Logic Input. Connect to DVDD (MAX1447/MAX1498) or VDD (MAX1496) to hold the
current ADC value on the LED. Connect to GND to update the LED at a rate of 2.5Hz and
disable the hold function. For the MAX1447, only placing the device into hold mode initiates
an offset mismatch calibration. Assert HOLD high for a minimum of 2s to ensure the
completion of offset mismatch calibration.
15 14 DIG0 Digit 0 Driver
16 15 DIG1 Digit 1 Driver
17 16
GLED
Ground for LED Display Digit Driver
18 17 DIG2 Digit 2 Driver
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
10 ______________________________________________________________________________________
Detailed Description
The MAX1447/MAX1496/MAX1498 low-power, highly
integrated ADCs with LED drivers convert a ±2V differ-
ential input voltage (one count is equal to 100µV for the
MAX1447/MAX1498 and 1mV for the MAX1496) with a
sigma-delta ADC and output the result to an LED. An
additional ±200mV input range (one count is equal to
10µV for the MAX1447/MAX1498 and 100µV for the
MAX1496) is available to measure small signals with
increased resolution.
The devices operate from a single 2.7V to 5.25V power
supply and offer 3.5-digit (MAX1496) or 4.5-digit
(MAX1447/MAX1498) conversion results. An internal
2.048V reference, internal charge pump, and a high-accu-
racy on-chip oscillator eliminate external components.
The devices also feature on-chip buffers for the differen-
tial input signal and external-reference inputs, allowing
direct interface with high-impedance signal sources. In
addition, they use continuous internal offset-calibration
and offer >100dB of 50Hz and 60Hz line-noise rejec-
tion. Other features include data hold and peak detec-
tion and overrange/underrange detection.
Analog Input Protection
Internal protection diodes limit the analog input range
from VNEG to (AVDD + 0.3V) for the MAX1447/
MAX1498, and from VNEG to (VDD + 0.3V) for the
MAX1496. If the analog input exceeds this range, limit
the input current to 10mA.
Internal Analog Input/Reference Buffers
The MAX1447/MAX1496/MAX1498 analog input/refer-
ence buffers allow the use of high-impedance signal
sources. The input buffers’ common-mode input range
allows the analog inputs and the reference to range from
-2.2V to +2.2V.
Pin Description (continued)
PIN
MAX1496
MAX1447/
MAX1498
NAME
FUNCTION
19 18 DIG3 Digit 3 Driver
20 20
SEGA
Segment A Driver
21 21
SEGB
Segment B Driver
22 22
SEGC
Segment C Driver
23 23
SEGD
Segment D Driver
24 24
SEGE
Segment E Driver
25 25 VLED LED Display Segment Driver Supply. Connect to a +2.7V to +5.25V supply. Bypass with a
0.1µF capacitor to GLED.
26 26
SEGF
Segment F Driver
27 27
SEGG
Segment G Driver
28 28
SEGDP
Segment DP Driver
—6AV
DD Analog Positive Supply Voltage. Connect AVDD to a +2.7V to +5.25V power supply. Bypass
AVDD to GND with a 0.1µF capacitor.
—7
DVDD
Digital Positive Supply Voltage. Connect DVDD to a +2.7V to +5.25V power supply. Bypass
DVDD to GND with a 0.1µF capacitor.
—19DIG4 Digit 4 Driver
—29
LED_EN
Active-High LED Enable. The MAX1447/MAX1498 display driver turns off when the LED_EN
is driven to logic low. The MAX1447/MAX1498 LED display driver turns on when LED_EN is
driven to logic high.
—30
DPON
Decimal-Point Enable Input. Controls the decimal point of the LED. See the Decimal-Point
Control section. Connect to DVDD (MAX1447/MAX1498) or VDD (MAX1496) to enable the
decimal point.
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
______________________________________________________________________________________ 11
MAX1447
MAX1498
BINARY-TO-
BCD
CONVERTERS
ADC
LED
DRIVER
INPUT
BUFFERS
-2.5V
AIN+
AIN-
REF+
REF-
+2.5V
AVDD DVDD
GLED
2.048V
BANDGAP
REFERENCE
OSCILLATOR
CLOCK
SEG1
SEGF
SEGDP
DIG0
DIG4
CLK
TIMING
+2.5V
GND
A = 1.22
CHARGE
PUMP
-2.5V
VNEG
LED_EN
DPON
DPSET1
DPSET2
RANGE
PEAK
HOLD
VLED
ISET
Figure 1. MAX1447/MAX1498 Functional Diagram
Modulator
The MAX1447/MAX1496/MAX1498 perform analog-to-
digital conversions using a single-bit, 3rd-order, sigma-
delta modulator. The sigma-delta modulator converts
the input signal into a digital pulse train whose average
duty cycle represents the digitized signal information.
The modulator quantizes the input signal at a much
higher sample rate than the bandwidth of the input.
The MAX1447/MAX1496/MAX1498 modulator provides
3rd-order frequency shaping of the quantization noise
resulting from the single-bit quantizer. The modulator is
fully differential for maximum signal-to-noise ratio and
minimum susceptibility to power-supply noise. A single-
bit data stream is then presented to the digital filter to
remove the frequency-shaped quantization noise.
Digital Filtering
The MAX1447/MAX1496/MAX1498 contain an on-chip
digital lowpass filter that processes the data stream
from the modulator using a SINC4response:
The SINC4filter has a settling time of four output data
periods (4 x 200ms).
The MAX1447/MAX1496/MAX1498 have 25% over-
range capability built into the modulator and digital fil-
ter. The digital filter is optimized for the fCLK equal to
4.9152MHz. The frequency response of the SINC4filter is
calculated as follows:
where N is the oversampling ratio, and fm= N x output
data rate = 5Hz.
Hz N
Z
Z
Hf N
Nf
f
f
f
N
m
m
() ()
()
()
sin
sin
=
=
11
1
1
1
4
4
-
-
-
-
π
π
sin( )x
x
4
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
12 ______________________________________________________________________________________
Filter Characteristics
Figure 2 shows the filter frequency response. The
SINC4characteristic -3dB cutoff frequency is 0.228
times the first notch frequency (5Hz). The oversampling
ratio (OSR) for the MAX1496 is 128 and the OSR for the
MAX1447/MAX1498 is 1024.
The output data rate for the digital filter corresponds to
the positioning of the first notch of the filter’s frequency
response. The notches of the SINC4filter are repeated
at multiples of the first notch frequency. The SINC4filter
provides an attenuation of better than 100dB at these
notches. For example, 50Hz is equal to 10 times the
first notch frequency and 60Hz is equal to 12 times the
first notch frequency.
For large step changes at the input, allow a settling
time of 800ms before valid data is read.
Internal Clock
The MAX1447/MAX1496/MAX1498 contain an internal
oscillator. Using the internal oscillator saves board
space by removing the need for an external clock
source. The oscillator is optimized to give 50Hz and
60Hz power-supply and common-mode rejection.
Charge Pump
The MAX1447/MAX1496/MAX1498 contain an internal
charge pump to provide the negative supply voltage
for the internal analog input/reference buffers.
The bipolar input range of the analog input/reference
buffers allows this device to accept negative inputs
with high source impedances. Connect a 0.1µF capac-
itor from VNEG to GND.
LED Driver
The MAX1447/MAX1498 have a 4.5-digit common-cath-
ode display driver, and the MAX1496 has a 3.5-digit
common-cathode display driver. Figures 3 and 4 show
the connection schemes for a standard seven-segment
LED display. The LED update rate is 2.5Hz. The
MAX1447/MAX1496/MAX1498 automatically display the
results of the ADC, if desired (Table 1).
A
B
C
AAAA
D
DIGIT 4 DIGIT 3 DIGIT 2 DIGIT 1 DIGIT 0
DDDD
E
G
F
EEE
GGGG
FFFF
BBBB
CC CC
DP DP DP DP DP
Figure 3. Segment Connection for the MAX1447/MAX1498
(4.5 Digits)
A
B
AA A
D
DIGIT 3 DIGIT 2 DIGIT 1 DIGIT 0
DDD
E
G
F
EE
GGG
FFF
BBB
CC C
DP DP DP DP
C
Figure 4. Segment Connection for the MAX1496 (3.5 Digits)
HOLD PEAK DISPLAY VALUES FORM
1XHold value
01Peak value
00Latest ADC result
Table 1. LED Priority Table
X= Don’t care.
FREQUENCY (Hz)
GAIN (dB)
5040302010
-160
-120
-80
-40
0
-200
060
Figure 2. Frequency Response of the SINC4Filter (Notch at 50Hz
and 60Hz)
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
______________________________________________________________________________________ 13
Figure 5 shows a typical common-cathode configura-
tion for two digits. In common-cathode configuration,
the cathodes of all LEDs in a digit are connected
together. Each segment driver of the MAX1447/
MAX1496/MAX1498 connects to its corresponding
LED’s anodes. For example, segment driver SEGA con-
nects to all LED segments designated as A. Similar
configurations are used for other segment drivers.
The MAX1447/MAX1496/MAX1498 use a multiplexing
scheme to drive one digit at a time. The scan rate is fast
enough to make the digits appear to be lit. Figures 6 and
7 show data-timing diagrams for the MAX1447/
MAX1496/MAX1498, where T is the display scan period
(typically around 1/512Hz or 1.9531ms for the
MAX1447/MAX1498, and 1/640Hz or 1.5625ms for the
MAX1496). TON in Figures 6 and 7 denotes the amount
of time each digit is on and is calculated as follows:
TTmss MAX MAX
TTms s MAX
ON
ON
== =
== =
5
1 95312
5390 60 1447 1498
4
1 5625
4390 60 1496
..( / )
..( )
µ
µ
A
A
A
DIGIT 1 DIGIT 2
SEGDP
SEGG
SEGF
SEGE
SEGD
SEGC
SEGB
SEGA
DD
EE
GG
FF
BB
CC
DP DP
B C D E F G DP A B C D E F G DP
Figure 5. Two-Digit Common-Cathode Configuration
143210432 04
T
TON
DIGIT 4 (MSD)
DIGIT 3
DIGIT 2
DIGIT 1
DIGIT 0 (LSD)
DATA
MSD LSD
Figure 6. LED Voltage Waveform—MAX1447/MAX1498
332103210 21
T
TON
DIGIT 3 (MSD)
DIGIT 2
DIGIT 1
DIGIT 0 (LSD)
DATA
MSD LSD
Figure 7. LED Voltage Waveform—MAX1496
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
14 ______________________________________________________________________________________
Decimal-Point Control
The MAX1447/MAX1496/MAX1498 allow for full deci-
mal-point control and feature leading-zero suppression.
Use the DPON, DPSET1, and DPSET2 bits in the con-
trol register to set the value of the decimal point (Tables
2 and 3). The MAX1447/MAX1496/MAX1498 overrange
and underrange display is shown in Table 4.
Leading-Zero Suppression
The MAX1447/MAX1496/MAX1498 include a leading-
zero suppression circuitry to turn off unnecessary zeros.
For example, when DPSET1 and DPSET2 = [0,0], 0.0 is
displayed instead of 000.0. This feature saves a substan-
tial amount of power from being wasted.
Interdigit Blanking
The MAX1447/MAX1496/MAX1498 also include an
interdigit blanking circuitry. Without this feature, it is
possible to see a faint digit next to a digit that is com-
pletely on. The interdigit blanking circuitry prevents
bleeding over into the next digit for a short period of
time. The typical interdigit blanking time is 4µs.
Reference
The MAX1447/MAX1496/MAX1498 reference sets the
full-scale range of the ADC transfer function. With a
nominal 2.048V reference, the ADC full-scale range is
±2V with RANGE = GND. With RANGE = DVDD
(MAX1447/MAX1498) or VDD (MAX1496), the full-scale
range is ±200mV. A decreased reference voltage
decreases full-scale range (see the Transfer Functions
section).
The MAX1447/MAX1496/MAX1498 accept either an
external reference or an internal reference (INTREF).
The INTREF logic selects the reference mode.
For internal-reference operation, set INTREF to DVDD
(MAX1447/MAX1498) or VDD (MAX1496), connect REF-
to GND, and bypass REF+ to GND with a 4.7µF capaci-
tor. The internal reference provides a nominal 2.048V
source between REF+ and GND. The internal-reference
temperature coefficient is typically 40ppm/°C.
Table 2. Decimal-Point Control Table—MAX1447/MAX1498
DPON DPSET1 DPSET2 DISPLAY OUTPUT ZERO INPUT READING
00 0 18888 0
00 1 18888 0
01 0 18888 0
01 1 18888 0
10 0 1888.8 0.0
10 1 188.88 0.00
11 0 18.888 0.000
11 1 1.8888 0.0000
Table 3. Decimal-Point Control Table—MAX1496
DPSET1 DPSET2 DISPLAY OUTPUT ZERO INPUT READING
00 188.8 0.0
01 18.88 0.00
10 1888 0
11 1.888 0.000
X= Don’t care.
Table 4. LED During Overrange and
Underrange Conditions
CONDITION MAX1496
MAX1447/MAX1498
Overrange 1--- 1----
Underrange -1--- -1----
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
______________________________________________________________________________________ 15
For external-reference operation, set INTREF to GND.
REF+ and REF- are fully differential. For a valid exter-
nal-reference input, VREF+ must be greater than VREF-.
Bypass REF+ and REF- with a 0.1µF or greater capaci-
tor to GND in external-reference mode.
Figure 8 shows the MAX1447/MAX1496/MAX1498 oper-
ating with an external differential reference. In this fig-
ure, REF- is connected to the top of the strain gauge
and REF+ is connected to the midpoint of the resistor-
divider of the supply.
Figure 9 shows the MAX1447/MAX1496/MAX1498 oper-
ating with an external single-ended reference. In this
figure, REF- is connected to GND and REF+ is driven
with an external 2.048V reference. Bypass REF+ to
GND with a 0.47µF capacitor.
Applications Information
Power-On Reset
At power-up, the digital filter and modulator circuits reset.
The MAX1447/MAX1498 allows 6s for the reference to
stabilize before performing enhanced offset calibration.
During these 6s, the MAX1447/MAX1498 display 1.2V
to 1.5V when a stable reference is detected. If a valid
reference is not found, the MAX1447/MAX1498 time out
after 6s and begin enhanced offset calibration.
Enhanced offset calibration typically lasts 2s. The
MAX1447/MAX1498 begin converting after enhanced
offset calibration.
Offset Calibration
The MAX1447/MAX1496/MAX1498 offer on-chip offset
calibration. The device offset calibrates during every con-
version cycle.
Enhanced Offset Calibration
(MAX1447 Only)
Enhanced offset calibration is a more accurate calibra-
tion method that is needed in the case of the ±200mV
range and 4.5-digit resolution. In addition to enhanced
offset calibration at power-up, the MAX1447 performs
enhanced calibration on demand by connecting HOLD
to AVDD for > 2s.
Peak
The MAX1447/MAX1496/MAX1498 feature peak-detec-
tion circuitry. When activated (PEAK connected to
AVDD for the MAX1498/MAX1447 or to VDD for the
MAX1496), the devices display only the highest voltage
measured to the LED.
First, the current ADC result is displayed. The new ADC
conversion result is compared to the current result. If the
new value is larger than the previous peak value, the
new value is displayed. If the new value is less than the
previous peak value, the display remains unchanged.
Connect PEAK to GND to clear the peak value and dis-
able the peak function.
Figure 9. Thermocouple Application with the MAX1447/MAX1496/
MAX1498
Figure 8. Strain-Gauge Application with the MAX1447/MAX1496/
MAX1498
MAX1447
MAX1496
MAX1498
AVDD DVDD
4.7µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
ANALOG SUPPLY
FERRITE
BEAD
RREF
R
R
ACTIVE
GAUGE
DUMMY
GAUGE
REF+
REF-
AIN+
AIN-
GND
4.7µF
0.1µF
MAX1447
MAX1496
MAX1498
MAX6062
+5V
+2.048V
THERMOCOUPLE
JUNCTION
0.1µF
0.47µF
AIN+
AIN-
REF+
REF-
GND
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
16 ______________________________________________________________________________________
Hold
The MAX1447/MAX1496/MAX1498 feature data-hold
circuitry. When activated (HOLD is set to AVDD for the
MAX1447/MAX1498 or to VDD for the MAX1496), the
device holds the current reading on the LED.
Strain-Gauge Measurement
Connect the differential inputs of the MAX1447/
MAX1496/MAX1498 to the bridge network of the strain
gauge. In Figure 8, the analog supply voltage powers
the bridge network and the MAX1447/MAX1496/
MAX1498, along with the reference voltage. The
MAX1447/MAX1496/MAX1498 handle an analog input
voltage range of ±200mV and ±2V full scale. The ana-
log/reference inputs of the parts allow the analog input
range to have an absolute value of anywhere between
-2.2V and +2.2V.
Thermocouple Measurement
Figure 9 shows a connection from a thermocouple to
the MAX1447/MAX1496/MAX1498. In this application,
the MAX1447/MAX1496/MAX1498 take advantage of
the on-chip input buffers that allow large source imped-
ances on the front end. The decoupling capacitors
reduce noise pickup from the thermocouple leads. To
place the differential voltage from the thermocouple at
a suitable common-mode voltage, the AIN- input of the
MAX1447/MAX1496/MAX1498 is biased to GND. Use
an external temperature sensor, such as the DS75, and
a microcontroller to perform cold-junction temperature
compensation.
Transfer Functions
Figures 10–13 show the transfer functions of the
MAX1447/MAX1496/MAX1498.
The transfer function for the MAX1447/MAX1498 with
AIN+ - AIN- ≥0, RANGE = GND is:
The transfer function for the MAX1447/MAX1498 with
AIN+ - AIN- < 0, RANGE = GND is:
The transfer function for the MAX1447/MAX1498 with
AIN+ - AIN- ≥0, RANGE = DVDD is:
The transfer function for the MAX1447/MAX1498 with
AIN+ - AIN- < 0, RANGE = DVDD is:
COUNT VV
VV
AIN AIN
REF REF
. , =×
×+
+
+
−−
−−
1 024 20 000 10 1
COUNT VV
VV
AIN AIN
REF REF
. , =×
×
+
+
−−
−−
1 024 20 000 10
COUNT VV
VV
AIN AIN
REF REF
. , =×
+
+
+
−−
−−
1 024 20 000 1
COUNT VV
VV
AIN AIN
REF REF
. , =×
+
+
−−
−−
1 024 20 000
-2V 0
ANALOG INPUT VOLTAGE
+2V
-100µV100µV
LED
1 - - - -
19,999
2
1
0
- 0
- 1
- 2
-19,999
- 1 - - - -
Figure 10. MAX1447/MAX1498 Transfer Function, ±2V Range
-200mV 0
ANALOG INPUT VOLTAGE
+200mV
-10µV10µV
LED
1 - - - -
19,999
2
1
0
- 0
- 1
- 2
-19,999
- 1 - - - -
Figure 11. MAX1447/MAX1498 Transfer Function, ±200mV Range
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
______________________________________________________________________________________ 17
The transfer function for the MAX1496 with AIN+ - AIN-
≥0, RANGE = GND is:
The transfer function for the MAX1496 with AIN+ - AIN-
< 0, RANGE = GND is:
The transfer function for the MAX1496 with AIN+ - AIN-
≥0, RANGE = VDD is:
The transfer function for the MAX1496 with AIN+ - AIN-
< 0, RANGE = VDD is:
Supplies, Layout, and Bypassing
Power up AVDD and DVDD (MAX1447/MAX1498) and
VDD (MAX1496) before applying an analog input and
external-reference voltage to the device. If this is not
possible, limit the current into these inputs to 50mA.
When the analog and digital supplies come from the
same source, isolate the digital supply from the analog
supply with a low-value resistor (10Ω) or ferrite bead.
For best performance, ground the MAX1447/
MAX1496/MAX1498 to the analog ground plane of the
circuit board.
Avoid running digital lines under the device as this can
couple noise onto the IC. Run the analog ground plane
under the MAX1447/MAX1496/MAX1498 to minimize
coupling of digital noise. Make the power-supply lines
to the MAX1447/MAX1496/MAX1498 as wide as possi-
ble to provide low-impedance paths and reduce the
effects of glitches on the power-supply line.
Shield fast-switching signals, such as clocks, with digital
ground to avoid radiating noise to other sections of the
board. Avoid running clock signals near the analog
inputs. Avoid crossover of digital and analog signals.
Running traces that are on opposite sides of the board at
right angles to each other reduces feedthrough effects.
Good decoupling is important when using high-resolution
ADCs. Decouple the supplies with 0.1µF ceramic capaci-
tors to GND. Place these components as close to the
device as possible to achieve the best decoupling.
COUNT VV
VV
AIN AIN
REF REF
. =×
×+
+
+
−−
−−
1 024 2000 10 1
COUNT VV
VV
AIN AIN
REF REF
. =×
×
+
+
−−
−−
1 024 2000 10
COUNT VV
VV
AIN AIN
REF REF
. =×
+
+
+
−−
−−
1 024 2000 1
COUNT VV
VV
AIN AIN
REF REF
. =×
+
+
−−
−−
1 024 2000
-200mV 0
ANALOG INPUT VOLTAGE
+200mV
-100µV100µV
LED
1 - - -
1999
2
1
0
- 0
- 1
- 2
-1999
- 1 - - -
Figure 12. MAX1496 Transfer Function, ±200mV Range
-2V 0
ANALOG INPUT VOLTAGE
+2V
-1mV 1mV
LED
1 - - -
1999
2
1
0
- 0
- 1
- 2
-1999
- 1 - - -
Figure 13. MAX1496 Transfer Function, ±2V Range
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
18 ______________________________________________________________________________________
Selecting Segment Current
A resistor from ISET to ground sets the current for each
LED segment. See Table 5 for more detail. Use the fol-
lowing formula to set the segment current:
RISET values below 25kΩincrease the ISEG.However,
the internal current-limit circuit limits the ISEG to less than
30mA. At higher ISEG values, proper operation of the
device is not guaranteed. In addition, the power dissipat-
ed may exceed the package power-dissipation limit.
Choosing Supply Voltage to Minimize
Power Dissipation
The MAX1447/MAX1496/MAX1498 drive a peak current
of 25.5mA into LEDs with a 2.2V forward voltage drop
when operated from a supply voltage of at least 3.0V.
Therefore, the minimum voltage drop across the inter-
nal LED drivers is (3.0V - 2.2V) = 0.8V. The MAX1447/
MAX1496/MAX1498 sink (8 x 25.5mA = 204mA) when
the outputs are operating and the LED segment drivers
are at full current. For a 3.3V supply, the MAX1447/
MAX1496/MAX1498 dissipate (3.3V - 2.2V) x 204 =
224.4mW. If a higher supply voltage is used, the driver
absorbs a higher voltage, and the driver’s power dissi-
pation increases accordingly. However, if the LEDs
used have a higher forward voltage drop than 2.2V, the
supply voltage must be raised accordingly to ensure
that the driver always has at least 0.8V headroom.
For a VLED supply voltage of 2.7V, the maximum LED
forward voltage is 1.9V to ensure 0.8V driver headroom.
The voltage drop across the drivers with a nominal +5V
supply (5.0V - 2.2V = 2.8V) is almost three times the
drop across the drivers with a nominal 3.3V supply
(3.3V - 2.2V = 1.1V). Therefore, the driver’s power dissi-
pation increases three times. The power dissipation in
the part causes the junction temperature to rise accord-
ingly. In the high ambient temperature case, the total
junction temperature may be very high (>+125°C). At
higher junction temperatures, the ADC performance
degrades. To ensure the dissipation limit for the
MAX1447/MAX1496/MAX1498 is not exceeded and the
ADC performance is not degraded, a diode can be
inserted between the power supply and VLED.
Computing Power Dissipation
The following can be used to compute power dissipation:
PD = (VLED x IVLED ) + (VLED - VDIODE)
(DUTY x ISEG x N) + VSUPPLY x ISUPPLY
VLED = LED driver supply voltage
IVLED = VLED bias current
VDIODE = LED forward voltage
DUTY = segment ON time during each digit ON time
ISEG = segment current set by RISET
N = number of segments driven (worst case is eight)
VSUPPLY = supply voltage of the part
ISUPPLY = supply current from VDD for the MAX1496 or
AVDD + DVDD for the MAX1447/MAX1498.
Dissipation Example
For ISEG = 25.5mA, N = 8, DUTY = 127 / 128, VDIODE =
1.5V at 25.5mA, VLED = VSUPPLY = 5.25V:
PD = (5.25 x 2mA) + (5.25V - 1.5) [(127 / 128)
x 25.5mA x 8)] + 5.25 x 1.080mA
PD = 0.7751W
28-Pin SSOP-Package Example
For the 28-pin SSOP package (TJA = 1 / 0.009496 =
+105.3°C/W), the maximum allowed ambient tempera-
ture TAis given by:
TJ(max) = TA+ (PD x TJA) =
+125°C = TA+ (0.7751W x +105.3°C/W)
TA= +43°C
Thus, the device cannot operate safely at a maximum
package temperature of +85°C. The power dissipates
in the part need to be lowered.
IV
R
SEG ISET
=
×
120 450
.
RISET (kΩ)I
SEG (mA)
25 21.6
50 10.8
100 5.4
500 1.1
>2500 LED driver disabled
Table 5. Segment-Current Selection
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
______________________________________________________________________________________ 19
(PD x TJA) max = (+125°C) - (+85°C) = +40°C
PD (max) = +40°C /+105.3°C/W = 380mW
(VLED - VDIODE) = [380mW - (5.25V x 2mA) - 5.25V x
1.080mA] / [(127 / 128) x 25.5mA x 8]
VLED - VDIODE = 1.854V
VLED - VDIODE should have the following condition to
ensure it operates safely:
0.8V < VLED - VDIODE < 1.854V
28-Pin PDIP-Package Example
PD x TJA (max) = (+125°C) - (+85°C) = +40°C
PD (max) = +40°C / +70°C/W = 571mW
VLED - VDIODE = [571mW - (5.25V x 2mA) - 5.25V x
1.080mA] / [(127 / 128) x 25.5mA x 8]
VLED - VDIODE = 2.80V
For a 28-pin PDIP package, VLED - VDIODE should have
the following condition to ensure it operates safely:
0.8V < VLED - VDIODE < 2.80V
32-Pin TQFP Package
The MAX1447/MAX1498 TQFP package can operate
safely for all supply voltages provided VDIODE > 1.5V.
Definitions
INL
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line is either a best-straight-line fit or a line
drawn between the end points of the transfer function,
once offset and gain errors have been nullified. INL for
the MAX1447/MAX1496/MAX1498 is measured using
the end-point method.
DNL
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of ±1 LSB. A
DNL error specification of less than ±1 LSB guarantees
no missing codes and a monotonic transfer function.
Rollover Error
Rollover error is defined as the absolute-value differ-
ence between a near positive full-scale reading and
near negative full-scale reading. Rollover error is tested
by applying a full-scale positive voltage, swapping
AIN+ and AIN-, and adding the results.
Zero Input Reading
Ideally, with AIN+ connected to AIN-, the MAX1447/
MAX1496/MAX1498 LED displays zero. Zero input
reading is the measured deviation from the ideal zero
and the actual measured point.
Gain Error
Gain error is the amount of deviation between the mea-
sured full-scale transition point and the ideal full-scale
transition point.
Common-Mode Rejection
Common-mode rejection (CMR) is the ability of a
device to reject a signal that is common to both input
terminals. The common-mode signal can be either an
AC or a DC signal or a combination of the two. CMR is
often expressed in decibels.
Normal-Mode 50Hz and 60Hz Rejection
(Simultaneously)
Normal-mode rejection is a measure of how much output
changes when 50Hz and 60Hz signals are injected into
only one of the differential inputs. The MAX1447/
MAX1496/MAX1498 sigma-delta converter uses its inter-
nal digital filter to provide normal-mode rejection to both
50Hz and 60Hz power-line frequencies simultaneously.
Power-Supply Rejection Ratio
Power-supply rejection ratio (PSRR) is the ratio of the input
supply change (in volts) to the change in the converter
output (in volts). It is typically measured in decibels.
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
20 ______________________________________________________________________________________
MAX1496
0.1µF 4.7µF
0.1µF
10µF
2.7V TO
5.25V
AIN+
AIN-
VLED
VDD
ISET VNEG GND REF- REF+ GLED
DPSET2
DPSET1
INTREF
PEAK
RANGE
HOLD
DIG0–DIG3
DIGIT
CONNECTIONS
SEGA–SEGDP
SEGMENT
CONNECTIONS
VIN
25kΩ
MAX1447
MAX1498
0.1µF 4.7µF
0.1µF
0.1µF
10µF
10µF
LISO
2.7V TO
5.25V
AIN+
AIN-
VLED
DVDD
AVDD
ISET VNEG GND REF- REF+ GLED
DPSET2
DPSET1
INTREF
PEAK
RANGE
HOLD
DPON
DIG0–DIG4
DIGIT
CONNECTIONS
SEGA–SEGDP
SEGMENT
CONNECTIONS
VIN
25kΩ
Typical Operating Circuits
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
______________________________________________________________________________________ 21
MAX1447
MAX1498
TQFP
32 28
293031 25
26
27
VNEG
DPON
LED_EN
SEGDP
REF-
SEGG
SEGF
VLED
10 13 15
14 1611 12
9
DPSET2
HOLD
PEAK
DIG1
DIG0
GLED
17
18
19
20
21
22
23 SEGD
24 SEGE
SEGC
SEGB
SEGA
DIG4
DIG3
DIG2
2
3
4
5
6
7
8INTREF
DVDD
AVDD
GND
ISET
AIN-
AIN+
1REF+
DPSET1
RANGE
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SEGDP
SEGG
SEGF
VLED
SEGE
SEGD
DIG0
SEGC
SEGB
SEGA
DIG3
DIG2
GLED
DIG1
HOLD
PEAK
DPSET2
DPSET1
RANGE
INTREF
VDD
GND
AIN-
AIN+
ISET
REF+
REF-
VNEG
SSOP/PDIP
TOP VIEW
MAX1496
Pin Configurations
Chip Information
TRANSISTOR COUNT: 80,000
PROCESS: BiCMOS
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
22 ______________________________________________________________________________________
32L/48L,TQFP.EPS
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
______________________________________________________________________________________ 23
SSOP.EPS
PACKAGE OUTLINE, SSOP, 5.3 MM
1
1
21-0056 C
REV.DOCUMENT CONTROL NO.APPROVAL
PROPRIETARY INFORMATION
TITLE:
NOTES:
1. D&E DO NOT INCLUDE MOLD FLASH.
2. MOLD FLASH OR PROTRUSIONS NOT TO EXCEED .15 MM (.006").
3. CONTROLLING DIMENSION: MILLIMETERS.
4. MEETS JEDEC MO150.
5. LEADS TO BE COPLANAR WITHIN 0.10 MM.
7.90
H
L
0∞
0.301
0.025
8∞
0.311
0.037
0∞
7.65
0.63
8∞
0.95
MAX
5.38
MILLIMETERS
B
C
D
E
e
A1
DIM
A
SEE VARIATIONS
0.0256 BSC
0.010
0.004
0.205
0.002
0.015
0.008
0.212
0.008
INCHES
MIN MAX
0.078
0.65 BSC
0.25
0.09
5.20
0.05
0.38
0.20
0.21
MIN
1.73 1.99
MILLIMETERS
6.07
6.07
10.07
8.07
7.07
INCHES
D
D
D
D
D
0.239
0.239
0.397
0.317
0.278
MIN
0.249
0.249
0.407
0.328
0.289
MAX MIN
6.33
6.33
10.33
8.33
7.33
14L
16L
28L
24L
20L
MAX N
A
D
eA1 L
C
HE
N
12
B
0.068
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
24 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
©2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
PDIPW.EPS
PACKAGE OUTLINE, .600" PDIP
1
1
21-0044 B
REV.DOCUMENT CONTROL NO.APPROVAL
PROPRIETARY INFORMATION
TITLE:
TOP VIEW
FRONT VIEW
0.700
MAX
-
0.200
0.020
0.080
0.009
0.625
0.012
0.065
0.600 BSC
INCHES
E1
-
eA
eB
0.005
0.600
0.008
D1
E
C
DIM
0.045
0.016
0.055
0.015
B
B1
A1
A3
MIN
-A
15.24 BSC
-
0.13
0.21
15.24
17.78
0.22
15.87
0.30
MILLIMETERS
0.39
0.41
1.40
1.14
-
MIN
0.51
1.65
-
2.03
MAX
5.08
A2 0.125 0.175 3.18 4.45
0.525 0.575 13.34 14.61
e0.100 BSC 2.54 BSC
0.150
0.120L3.05 3.81
2.0752.025D
D
MINDIM
D
INCHES
MAX
51.44 52.71
MILLIMETERS
MIN MAX
40 AC
1.430 1.470 AB37.3436.32 28
1.230 1.270 AA32.2631.24 24
NMS011
N
D
A
L
A1
e
B
B1
A2
A3
E1
E
C
eA
eB
0∞-15∞
SIDE VIEW
1
D1
VARIATIONS:
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)