IRFP350 Data Sheet July 1999 16A, 400V, 0.300 Ohm, N-Channel Power MOSFET Ordering Information PART NUMBER IRFP350 PACKAGE TO-247 2319.4 Features * 16A, 400V This N-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA17434. File Number * rDS(ON) = 0.300 * Single Pulse Avalanche Energy Rated * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards" Symbol BRAND D IRFP350 NOTE: When ordering, include the entire part number. G S Packaging JEDEC STYLE TO-247 TOP VIEW SOURCE DRAIN GATE DRAIN (FLANGE) 4-335 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999 IRFP350 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg IRFP350 400 400 16 10 64 20 180 1.44 700 -55 to 150 UNITS V V A A A V W W/oC mJ oC 300 260 oC oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BVDSS VGS = 0V, ID = 250A (Figure 10) 400 - - V Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 250A 2.0 - 4.0 V Zero-Gate Voltage Drain Current IDSS On-State Drain Current (Note 2) ID(ON) Gate to Source Leakage Current IGSS Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time rDS(ON) gfs tD(ON) Rise Time tr Turn-Off Delay Time tD(OFF) Fall Time VDS = Rated BVDSS, VGS = 0V - - 25 A VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 A VDS > ID(ON) x rDS(ON)MAX, VGS = 10V (Figure 7) 16 - - A - - 100 nA - 0.250 0.300 8.0 10 - S VGS = 20V VGS = 10V, ID = 8.9A (Figures 8, 9) VDS = 2 x VGS, ID = 8.0A (Figure 12) VDD = 200V, ID = 16A, RGS = 6.2, VGS = 10V, RL = 12.3 MOSFET Switching Times are Essentially Independent of Operating Temperature tf Total Gate Charge (Gate to Source + Gate to Drain) Qg Gate to Source Charge Qgs Gate to Drain "Miller" Charge Qgd Input Capacitance CISS Output Capacitance COSS Reverse-Transfer Capacitance CRSS Internal Drain Inductance LD Internal Source Inductance LS VGS = 10V, ID = 16A, VDS = 0.8 x Rated BVDSS. IG(REF) = 1.5mA (Figure 14) Gate Charge is Essentially Independent of Operating Temperature VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) Measured Between the Contact Screw on Header that is Closer to Source and Gate Pins and Center of Die Measured from the Source Lead, 6mm (0.25in) From Header to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Devices Inductances - 12 18 ns - 51 77 ns - 75 110 ns - 47 71 ns - 87 130 nC - 10 - nC - 33 - nC - 2000 - pF - 400 - pF - 100 - pF - 5.0 - nH - 12.5 - nH - - 0.70 oC/W - - 30 oC/W D LD G LS S Junction to Case RJC Junction to Ambient RJA 4-336 Free Air Operation IRFP350 Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current ISD Pulse Source to Drain Current (Note 3) ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode D MIN TYP MAX UNITS - - 16 A - - 64 A - - 1.6 V 270 - 1300 ns 1.7 - 8.1 C G S Source to Drain Diode Voltage (Note 2) VSD Reverse Recovery Time trr Reverse Recovered Charge QRR TJ = 25oC, ISD = 16A, VGS = 0V (Figure 13) TJ = 150oC, ISD = 15A, dISD/dt = 100A/s TJ = 150oC, ISD = 15A, dISD/dt = 100A/s NOTES: 2. Pulse Test: Pulse width 300s, duty cycle 2%. 3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 40V, starting TJ = 25oC, L = 5.66mH, RG = 50, peak IAS = 15A. Typical Performance Curves Unless Otherwise Specified 20 ID , DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 0.2 0 16 12 8 4 0 0 50 100 150 25 50 TC , CASE TEMPERATURE (oC) 75 100 150 125 TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 1 ZJC, NORMALIZED TRANSIENT THERMAL IMPEDANCE POWER DISSIPATION MULTIPLIER 1.2 0.5 0.2 0.1 0.1 PDM 0.05 0.02 0.01 t1 t2 t2 10-2 SINGLE PULSE 10-3 10-5 10-4 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJC +TC 10-3 10-2 0.1 t1 , RECTANGULAR PULSE DURATION (S) FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 4-337 1 10 IRFP350 Typical Performance Curves (Continued) 25 OPERATION IN THIS REGION IS LIMITED BY rDS(ON) VGS = 6.0V VGS = 10V 102 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 103 Unless Otherwise Specified 10s 100s 10 1ms 10ms 1 TC = 25oC TJ = MAX RATED SINGLE PULSE 0.1 DC 102 10 VDS , DRAIN TO SOURCE VOLTAGE (V) 1 VGS = 5.5V 15 10 VGS = 5.0V 5 0 103 VGS = 4.0V 0 102 VGS = 10V 20 VGS = 6.0V 15 VGS = 5.5V 10 VGS = 5.0V 5 VGS = 4.0V 0 0 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS = 2 x VGS 10 TJ = 150oC 1 10 0.1 0 2 4 6 8 VSD , GATE TO SOURCE VOLTAGE (V) FIGURE 6. SATURATION CHARACTERISTICS NORMALIZED DRAIN TO SOURCE ON RESISTANCE VOLTAGE rDS(ON), DRAIN TO SOURCE ON RESISTANCE 2.5 0.60 VGS = 10V VGS = 20V 0.30 0.15 0 0 13 26 39 ID, DRAIN CURRENT (A) 52 FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 4-338 10 FIGURE 7. TRANSFER CHARACTERISTICS PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 0.45 TJ = 25oC VGS = 4.5V 2 4 6 8 VDS , DRAIN TO SOURCE VOLTAGE (V) 0.75 200 FIGURE 5. OUTPUT CHARACTERISTICS ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 4.5V 40 80 120 160 VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA 25 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 20 65 2.0 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX ID = 8.9A, VGS = 10V 1.5 1.0 0.5 0 -60 -40 -20 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE IRFP350 Typical Performance Curves (Continued) 5000 ID = 250A 1.15 1.05 0.95 0.85 0.75 -60 2000 COSS 1000 -40 -20 0 20 40 60 80 0 100 120 140 160 ISD, SOURCE TO DRAIN CURRENT (A) 15 TJ = 150oC 5 5 2 10 2 5 102 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 10 TJ = 150oC TJ = 25oC 1 0.1 0 5 10 15 ID , DRAIN CURRENT (A) 20 25 0 FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT 0.4 0.8 1.2 1.6 VSD , SOURCE TO DRAIN VOLTAGE (V) ID = 16A 16 VDS = 80V 12 VDS = 200V VDS = 320V 8 4 0 0 30 60 90 120 150 Qg , GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 4-339 2.0 FIGURE 13. SOURCE TO DRAIN DIODE FORWARD VOLTAGE 20 VGS, GATE TO SOURCE VOLTAGE (V) gfs, TRANSCONDUCTANCE (S) 102 TJ = 25oC 0 1 FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS = 2 x VGS 10 CRSS VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE 20 CISS 3000 TJ , JUNCTION TEMPERATURE (oC) 25 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGS 4000 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.25 Unless Otherwise Specified IRFP350 Test Circuits and Waveforms VDS BVDSS L tP VARY tP TO OBTAIN + RG REQUIRED PEAK IAS - VGS VDS IAS VDD VDD DUT tP 0V IAS 0 0.01 tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(ON) td(OFF) tf tr VDS RL 90% 90% + RG - VDD 10% 10% 0 90% DUT VGS VGS 0 10% VDS (ISOLATED SUPPLY) CURRENT REGULATOR 0.2F 50% PULSE WIDTH FIGURE 18. RESISTIVE SWITCHING WAVEFORMS FIGURE 17. SWITCHING TIME TEST CIRCUIT 12V BATTERY 50% VDD Qg(TOT) SAME TYPE AS DUT 50k Qgd 0.3F VGS Qgs D VDS DUT G 0 IG(REF) S 0 IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT 4-340 IG(REF) 0 FIGURE 20. GATE CHARGE WAVEFORMS IRFP350 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. 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