IRFP350 - Intersil Corporation

4-335

File Number

2319.4

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

IRFP350

16A, 400V, 0.300 Ohm, N-Channel

Power MOSFET

This N-Channel enhancement mode silicon gate power ﬁeld

effect transistor is an advanced power MOSFET designed,

tested, and guaranteed to withstand a speciﬁed level of

energy in the breakdown avalanche mode of operation. All of

these power MOSFETs are designed for applications such

as switching regulators, switching convertors, motor drivers,

relay drivers, and drivers for high power bipolar switching

transistors requiring high speed and low gate drive power.

These types can be operated directly from integrated

circuits.

Formerly developmental type TA17434.

Features

• 16A, 400V

•r

DS(ON) = 0.300Ω

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

Components to PC Boards”

Symbol

Packaging

JEDEC STYLE TO-247

TOP VIEW

Ordering Information

PART NUMBER PACKAGE BRAND

IRFP350 TO-247 IRFP350

NOTE: When ordering, include the entire part number.

SOURCE

DRAIN

(FLANGE)

GATE

Data Sheet July 1999

4-336

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Speciﬁed

IRFP350 UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS 400 V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 400 V

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID

TC = 100oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID16

10 A

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 64 A

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS ±20 V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD180 W

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.44 W/oC

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS 700 mJ

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

pkg 300

260

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe

device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTE:

1. TJ= 25oC to 125oC.

Electrical Speciﬁcations TC = 25oC, Unless Otherwise Speciﬁed

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BVDSS VGS = 0V, ID = 250µA (Figure 10) 400 - - V

Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA 2.0 - 4.0 V

Zero-Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 µA

VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 µA

On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = 10V (Figure 7) 16 - - A

Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA

DraintoSource OnResistance (Note2) rDS(ON) VGS = 10V, ID = 8.9A (Figures 8, 9) - 0.250 0.300 Ω

Forward Transconductance (Note 2) gfs VDS = 2 x VGS, ID = 8.0A (Figure 12) 8.0 10 - S

Turn-On Delay Time tD(ON) VDD = 200V, ID= 16A, RGS = 6.2Ω, VGS = 10V,

RL = 12.3Ω

MOSFET Switching Times are Essentially

Independent of Operating Temperature

-1218ns

Rise Time tr-5177ns

Turn-Off Delay Time tD(OFF) - 75 110 ns

Fall Time tf-4771ns

Total Gate Charge

(Gate to Source + Gate to Drain) QgVGS = 10V, ID = 16A, VDS = 0.8 x Rated BVDSS.

IG(REF) = 1.5mA (Figure 14)

Gate Charge is Essentially Independent of Operating

Temperature

- 87 130 nC

Gate to Source Charge Qgs -10- nC

Gate to Drain “Miller” Charge Qgd -33- nC

Input Capacitance CISS VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) - 2000 - pF

Output Capacitance COSS - 400 - pF

Reverse-Transfer Capacitance CRSS - 100 - pF

Internal Drain Inductance LDMeasured Between the

ContactScrewonHeader

that is Closer to Source

andGatePinsandCenter

of Die

Modified MOSFET

Symbol Showing the

Internal Devices

Inductances

- 5.0 - nH

Internal Source Inductance LSMeasured from the

Source Lead, 6mm

(0.25in) From Header to

Source Bonding Pad

- 12.5 - nH

Junction to Case RθJC - - 0.70 oC/W

Junction to Ambient RθJA Free Air Operation - - 30 oC/W

IRFP350

4-337

Source to Drain Diode Speciﬁcations

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current ISD Modified MOSFET

Symbol Showing the

Integral Reverse

P-N Junction Diode

- - 16 A

Pulse Source to Drain Current

(Note 3) ISDM - - 64 A

Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 16A, VGS = 0V (Figure 13) - - 1.6 V

Reverse Recovery Time trr TJ = 150oC, ISD = 15A, dISD/dt = 100A/µs 270 - 1300 ns

Reverse Recovered Charge QRR TJ = 150oC, ISD = 15A, dISD/dt = 100A/µs 1.7 - 8.1 µC

NOTES:

2. Pulse Test: Pulse width ≤ 300µs, duty cycle ≤ 2%.

3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD = 40V, starting TJ = 25oC, L = 5.66mH, RG = 50Ω, peak IAS = 15A.

Typical Performance Curves

Unless Otherwise Speciﬁed

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

0 50 100 150

TC, CASE TEMPERATURE (oC)

POWER DISSIPATION MULTIPLIER

0.2

0.4

0.6

0.8

1.0

1.2

TC, CASE TEMPERATURE (oC)

50 75 10025 150

ID, DRAIN CURRENT (A)

125

ZθJC, NORMALIZED TRANSIENT

0.1

10-2

10-5 10-4 10-3 0.1 1 10

t1, RECTANGULAR PULSE DURATION (S)

10-3

DUTY FACTOR: D = t1/t2

PDM

NOTES: t2

PEAK TJ= PDM x ZθJC x RθJC +TC

SINGLE PULSE

0.2

0.1

0.05

0.01

0.02

0.5

THERMAL IMPEDANCE

IRFP350

4-338

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

Typical Performance Curves

Unless Otherwise Speciﬁed (Continued)

102

110

102

0.1

ID, DRAIN CURRENT (A)

VDS, DRAIN TO SOURCE VOLTAGE (V) 103

103

10µs

100µs

1ms

10ms

TJ = MAX RATED

SINGLE PULSE

TC = 25oC

OPERATION IN THIS

REGION IS LIMITED

BY rDS(ON)

VDS, DRAIN TO SOURCE VOLTAGE (V)

40 80 120 1600 200

ID, DRAIN CURRENT (A)

VGS = 5.5V

VGS = 4.5V

VGS = 5.0V

VGS = 4.0V

PULSE DURATION = 80µs

VGS = 6.0V

VGS = 10V

DUTY CYCLE = 0.5% MAX

VDS, DRAIN TO SOURCE VOLTAGE (V)

2468010

ID, DRAIN CURRENT (A)

VGS = 10V

VGS = 5.0V

VGS = 4.5V

VGS = 5.5V

VGS = 4.0V

VGS = 6.0V

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

ID, DRAIN CURRENT (A)

VSD, GATE TO SOURCE VOLTAGE (V)

102

0.1

0246810

TJ = 150oCTJ = 25oC

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

VDS = 2 x VGS

ID, DRAIN CURRENT (A)

13 26 39

065

0.75

0.60

0.45

0.30

rDS(ON), DRAIN TO SOURCE

VGS = 20V

0.15

VGS = 10V

ON RESISTANCE

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

2.5

1.5

0.5

80-60 TJ, JUNCTION TEMPERATURE (oC)

NORMALIZED DRAIN TO SOURCE

2.0

1.0

00 60 120 160

ON RESISTANCE VOLTAGE

-20-40 20 40 100 140

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

ID = 8.9A, VGS = 10V

IRFP350

4-339

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE FORWARD VOLTAGE

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

Typical Performance Curves

Unless Otherwise Speciﬁed (Continued)

1.25

1.05

0.85

60-60 TJ, JUNCTION TEMPERATURE (oC)

NORMALIZED DRAIN TO SOURCE

1.15

0.95

0.75 -20 20 100 160

BREAKDOWN VOLTAGE

0-40 40 80 120 140

ID = 250µA

12 102 5102

C, CAPACITANCE (pF)

VDS, DRAIN TO SOURCE VOLTAGE (V)

5000

4000

3000

2000

1000

CRSS

CISS

COSS

VGS = 0V, f = 1MHz

CISS = CGS + CGD

CRSS = CGD

COSS ≈ CDS + CGS

ID, DRAIN CURRENT (A)

5101520025

gfs, TRANSCONDUCTANCE (S)

TJ = 150oC

TJ = 25oC

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

VDS = 2 x VGS

ISD, SOURCE TO DRAIN CURRENT (A)

VSD, SOURCE TO DRAIN VOLTAGE (V)

102

0.10 0.4 0.8 1.2 1.6 2.0

TJ = 25oC

TJ = 150oC

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

Qg, GATE CHARGE (nC)

30 60 90 1200 150

VGS, GATE TO SOURCE VOLTAGE (V)

VDS = 320V

ID = 16A

VDS = 200V

VDS = 80V

IRFP350

4-340

Test Circuits and Waveforms

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

VGS

0.01Ω

IAS

VDS

VDD

DUT

VARY tP TO OBTAIN

REQUIRED PEAK IAS

VDD

VDS

BVDSS

IAS

tAV

VGS

DUT

-VDD

tON

td(ON)

90%

10%

VDS 90%

10%

td(OFF)

tOFF

90%

50%

10% PULSE WIDTH

VGS

0.3µF

12V

BATTERY 50kΩ

VDS

DUT

IG(REF)

(ISOLATED

VDS

0.2µF

CURRENT

REGULATOR

ID CURRENT

SAMPLING

IG CURRENT

SAMPLING

SUPPLY)

RESISTOR RESISTOR

SAME TYPE

AS DUT Qg(TOT)

Qgd

Qgs

VDS

VGS

VDD

IG(REF)

IRFP350

4-341

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certiﬁcation.

Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-

out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is gr anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see w eb site http://www.intersil.com

Sales Ofﬁce Headquarters

NORTH AMERICA

Intersil Corporation

P. O. Box 883, Mail Stop 53-204

Melbourne, FL 32902

TEL: (407) 724-7000

FAX: (407) 724-7240

EUROPE

Intersil SA

Mercure Center

100, Rue de la Fusee

1130 Brussels, Belgium

TEL: (32) 2.724.2111

FAX: (32) 2.724.22.05

ASIA

Intersil (Taiwan) Ltd.

7F-6, No. 101 Fu Hsing North Road

Taipei, Taiwan

Republic of China

TEL: (886) 2 2716 9310

FAX: (886) 2 2715 3029

IRFP350