IRL2910S/L
HEXFET® Power MOSFET
PD - 91376C
S
D
G
VDSS = 100V
RDS(on) = 0.026Ω
ID = 55A
lLogic-Level Gate Drive
lSurface Mount
lAdvanced Process Technology
lUltra Low On-Resistance
lDynamic dv/dt Rating
lFast Switching
lFully Avalanche Rated
10/09/03
Parameter Typ. Max. Units
RθJC Junction-to-Case 0.75
RθJA Junction-to-Ambient ( PCB Mounted,steady-state)** 40
Thermal Resistance
°C/W
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V55
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V39 A
IDM Pulsed Drain Current 190
PD @TA = 25°C Power Dissipation 3.8 W
PD @TC = 25°C Power Dissipation 200 W
Linear Derating Factor 1.3 W/°C
VGS Gate-to-Source Voltage ± 16 V
EAS Single Pulse Avalanche Energy 520 mJ
IAR Avalanche Current29 A
EAR Repetitive Avalanche Energy20 mJ
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
°C
Absolute Maximum Ratings
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0W in a typical surface mount application.
The through-hole version (IRL2910L) is available for low-
profile applications.
Description
2
D Pak
TO-262
IRL2910S/L
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient 0.12 V/°C Reference to 25°C, ID = 1mA
0.026 VGS = 10V, ID = 29A
0.030 ΩVGS = 5.0V, ID = 29A
0.040 VGS = 4.0V, ID = 24A
VGS(th) Gate Threshold Voltage 1.0 2.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 28 S VDS = 50V, ID = 29A
25 VDS = 100V, VGS = 0V
250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage 100 nA VGS = 16V
Gate-to-Source Reverse Leakage -100 VGS = -16V
QgTotal Gate Charge 140 ID = 29A
Qgs Gate-to-Source Charge 20 nC VDS = 80V
Qgd Gate-to-Drain ("Miller") Charge 81 VGS = 5.0V, See Fig. 6 and 13
td(on) Turn-On Delay Time 11 VDD = 50V
trRise Time 100 ID = 29A
td(off) Turn-Off Delay Time 49 RG = 1.4Ω, VGS = 5.0V
tfFall Time 55 RD = 1.7Ω, See Fig. 10
Between lead,
and center of die contact
Ciss Input Capacitance 3700 VGS = 0V
Coss Output Capacitance 630 pF VDS = 25V
Crss Reverse Transfer Capacitance 330 = 1.0MHz, See Fig. 5
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
IGSS
IDSS Drain-to-Source Leakage Current
RDS(on) Static Drain-to-Source On-Resistance
LSInternal Source Inductance 7.5
ns
nH
µA
Source-Drain Ratings and Characteristics
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Notes:
Pulse width ≤ 300µs; duty cycle ≤ 2%.
VDD = 25V, starting TJ = 25°C, L = 1.2mH
RG = 25Ω, IAS = 29A. (See Figure 12)
ISD ≤ 29A, di/dt ≤ 490A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Uses IRL2910 data and test conditions
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) showing the
ISM Pulsed Source Current integral reverse
(Body Diode) p-n junction diode.
VSD Diode Forward Voltage 1.3 V TJ = 25°C, IS = 29A, VGS = 0V
trr Reverse Recovery Time 240 350 ns TJ = 25°C, IF = 29A
Qrr Reverse RecoveryCharge 1.8 2.7 µC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
S
D
G
55
190
A
IRL2910S/L
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics
1
10
100
1000
0.1 1 10 100
I , Drain-to-Source Current (A)
D
V , Drain-to-Source Voltage (V)
DS
A
20µs PULSE WIDTH
T = 25°C
J
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
2.5V
1
10
100
1000
0.1 1 10 100
I , Drain-to-Source Current (A)
D
V , Drain-to-Source Voltage (V)
DS
A
20µs PULSE WIDTH
T = 175°C
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
2.5V
J
1
10
100
1000
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
T = 25°C
J
GS
V , Gate-to-Source Voltage (V)
D
I , Drain-to-Source Current (A)
T = 175°C
J
A
V = 50V
20µs PULSE WIDTH
DS
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
J
T , Junction Temperature (°C)
R , Drain-to-Source On Resistance
DS(on)
(Normalized)
V = 10V
GS
A
I = 48A
D
IRL2910S/L
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0
1000
2000
3000
4000
5000
6000
1 10 100
C, Capacitance (pF)
DS
V , Drain-to-Source Voltage (V)
A
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0
3
6
9
12
15
0 40 80 120 160 200
Q , Total Gate Charge (nC)
G
V , Gate-to-Source Voltage (V)
GS
V = 80V
V = 50V
V = 20V
A
FOR TEST CIRCUIT
SEE FIGURE 13
I = 29A
DS
DS
DS
D
10
100
1000
0.4 0.8 1.2 1.6 2.0
T = 25°C
J
V = 0V
GS
V , Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
A
T = 175°C
J
1
10
100
1000
1 10 100 1000
V , Drain-to-Source Voltage (V)
DS
I , Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
D
DS(on)
10µs
100µs
1ms
10ms
A
T = 25°C
T = 175°C
Single Pulse
C
J
IRL2910S/L
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10a. Switching Time Test Circuit
VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
5.0V
+
-
VDD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
0
10
20
30
40
50
25 50 75 100 125 150 175
C
I , Drain Current (Amps)
D
T , Case Temperature (°C)
A
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10
t , Rectangular Pulse Duration (sec)
1
thJC
D = 0.50
0.01
0.02
0.05
0.10
0.20
SINGLE PULSE
(THERMAL RESPONSE)
A
Thermal Response (Z )
P
t
2
1
t
DM
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
12
J
DM thJC
C
IRL2910S/L
QG
QGS QGD
VG
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
5.0 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
0
200
400
600
800
1000
1200
1400
25 50 75 100 125 150 175
J
E , Single Pulse Avalanche Energy (mJ)
AS
A
Starting T , Junction Temperature (°C)
V = 25V
I
TOP 12A
20A
BOTTOM 29A
DD
D
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
IRL2910S/L
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFETS
* VGS = 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
RG
VDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
IRL2910S/L
D2Pak Part Marking Information
F530S
THIS IS AN IRF530S WIT H
LOT CODE 8024
ASS E MBLE D ON WW 02, 2000
IN THE ASS EMBLY LINE "L"
AS S E MB L Y
LOT CODE
INT ERNAT IONAL
RECTIFIER
LOGO
PART NUMB ER
DAT E CODE
YEAR 0 = 2000
WE E K 02
LINE L
DAT E CODE
IN THE ASS EMBLY LINE "L"
ASS E MBLE D ON WW 02, 2000
T HIS IS AN IRF530S WIT H
LOT CODE 8024 INT ERNAT IONAL
LOGO
RECTIFIER
LOT CODE
PART NUMB ER
F530S
For GB Production
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
IRL2910S/L
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXA
M
PLE:THIS IS A
N IRL3103L
LOT C
O
DE 1789
A
SSEM
BLY
PA
RT NUMBER
DA
TE C
ODE
W
EEK 19
LINE C
LO
T C
ODE
YEA
R 7 = 1997
A
SSEM
BLED O
N WW
19, 1997
IN THE A
SSEM
BLY LINE "C
"LOG
O
REC
TIFIER
INTERNA
TIONA
L
IGBT
1- GATE
2- COLLECTOR
3- EMITTER
IRL2910S/L
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 10/03
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
3
4
4
TRR
FEED DIRECTION
1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRECTION
10.90 (.429)
10.70 (.421)
16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
27.40 (1.079)
23.90 (.941)
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
